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TMS320C6652: 不使用DDR应如何处理

Part Number: TMS320C6652

你好,

我目前的设计中采用了TMS320C6652, 不需要使用DDR接口。

Hardware design guide for Keystone devices 章节 6.8.4 Unused DDR3 Pin Requirement中描述了不使用DDR接口时的注意事项,其中第一句是“If the DDR3 peripheral is disabled, all interface signals can be left floating and the input buffers are powered down.” 

我想了解一下软件方面应做什么操作以disable DDR3? 

另外,6.8.4中提及Even if the DDR3 interface is unused, a reference clock is still required to ensure that the DDR peripheral is initialized to a proper state. 我想了解一下,这个reference clock最低频率要求是多少?如果只是保证初始化的话,我能否在系统正常启动后再关闭该参考时钟以节约功耗?

谢谢!

 

  • 我想了解一下软件方面应做什么操作以disable DDR3? 

    没有。

    这个reference clock最低频率要求是多少?

    Hardware design guide for Keystone devices有说明。
    The DDR3 output clock is derived from the DDR3 PLL that uses DDRCLKP/N as a reference clock. The DDR3 output clock is 1/2 of the PLL output clock. For example, a 66.667-MHz reference clock multiplied times 20 results in a 1,333-MHz PLL output and a DDR3 output clock of 667 MHz for DDR3-1333 support.

    如果只是保证初始化的话,我能否在系统正常启动后再关闭该参考时钟以节约功耗?

    可以。