CCS version:12.5.0.00007
编译器：TI Clang v3.2.0.LTS
我想要调试TDA4的MCU R5F核，移植了ti-processor-sdk-rtos-j721s2-evm-09_01_00_06中的IPC相关示例代码，并生成了.out文件，加载进MCU_Cortex_R5_0之后，会一直运行，点击停止后，就显示0x80401414 no symbols are defined的问题。但是直接在linux系统编译出对应的IPC示例代码就可以正常运行。
我想要在CCS上建立可以debug的工程，除了在CCS中加载j721s2_linker_freertos.cmd和linker_mem_map.cmd文件，并加载对应的库之外，还需要加载或更改什么？
有没有移植工程的指导文档？
/*=========================*/
/* Linker Settings */
/*=========================*/
--retain="*(.bootCode)"
--retain="*(.startupCode)"
--retain="*(.startupData)"
--retain="*(.irqStack)"
--retain="*(.fiqStack)"
--retain="*(.abortStack)"
--retain="*(.undStack)"
--retain="*(.svcStack)"
--fill_value=0
--stack_size=0x8000
--heap_size=0x10000
--entry_point=_freertosresetvectors
-stack 0x8000 /* SOFTWARE STACK SIZE */
-heap 0x10000 /* HEAP AREA SIZE */
/*-------------------------------------------*/
/* Stack Sizes for various modes */
/*-------------------------------------------*/
__IRQ_STACK_SIZE = 0x1000;
__FIQ_STACK_SIZE = 0x0100;
__ABORT_STACK_SIZE = 0x0100;
__UND_STACK_SIZE = 0x0100;
__SVC_STACK_SIZE = 0x0100;
/*--------------------------------------------------------------*/
/* Section Configuration */
/*--------------------------------------------------------------*/
SECTIONS
{
.freertosrstvectors : {} palign(8) > MCU_R5F_TCMB_VECS
.bootCode : {} palign(8) > MCU_R5F_TCMB
.startupCode : {} palign(8) > MCU_R5F_TCMB
.startupData : {} palign(8) > MCU_R5F_TCMB, type = NOINIT
GROUP
{
.text.hwi : palign(8)
.text.cache : palign(8)
.text.mpu : palign(8)
.text.boot : palign(8)
} > MCU_R5F_TCMB
// .mpu_cfg > MCU_R5F_TCMB
.text : {} palign(8) > MCU1_0_DDR_SPACE
.const : {} palign(8) > MCU1_0_DDR_SPACE
.rodata : {} palign(8) > MCU1_0_DDR_SPACE
.cinit : {} palign(8) > MCU1_0_DDR_SPACE
.bss : {} align(4) > MCU1_0_DDR_SPACE
.far : {} align(4) > MCU1_0_DDR_SPACE
.data : {} palign(128) > MCU1_0_DDR_SPACE
.sysmem : {} > MCU1_0_DDR_SPACE
.data_buffer : {} palign(128) > MCU1_0_DDR_SPACE
.bss.devgroup : {*(.bss.devgroup*)} align(4) > MCU1_0_DDR_SPACE
.const.devgroup : {*(.const.devgroup*)} align(4) > MCU1_0_DDR_SPACE
.boardcfg_data : {} align(4) > MCU1_0_DDR_SPACE
.bss:taskStackSection : {} > MCU1_0_DDR_SPACE
.resource_table :
{
__RESOURCE_TABLE = .;
} > 0xA0100000
.tracebuf : {} align(1024) > MCU1_0_EXT_DATA
.stack : {} align(4) > MCU1_0_DDR_SPACE (HIGH)
// .bss:ddr_local_mem (NOLOAD) : {} > DDR_MCU1_0_LOCAL_HEAP
// .bss:app_log_mem (NOLOAD) : {} > APP_LOG_MEM
// .bss:tiovx_obj_desc_mem (NOLOAD) : {} > TIOVX_OBJ_DESC_MEM
.bss:ipc_vring_mem (NOLOAD) : {} > IPC_VRING_MEM
.irqStack : {. = . + __IRQ_STACK_SIZE;} align(4) > MCU1_0_DDR_SPACE (HIGH)
RUN_START(__IRQ_STACK_START)
RUN_END(__IRQ_STACK_END)
.fiqStack : {. = . + __FIQ_STACK_SIZE;} align(4) > MCU1_0_DDR_SPACE (HIGH)
RUN_START(__FIQ_STACK_START)
RUN_END(__FIQ_STACK_END)
.abortStack : {. = . + __ABORT_STACK_SIZE;} align(4) > MCU1_0_DDR_SPACE (HIGH)
RUN_START(__ABORT_STACK_START)
RUN_END(__ABORT_STACK_END)
.undStack : {. = . + __UND_STACK_SIZE;} align(4) > MCU1_0_DDR_SPACE (HIGH)
RUN_START(__UND_STACK_START)
RUN_END(__UND_STACK_END)
.svcStack : {. = . + __SVC_STACK_SIZE;} align(4) > MCU1_0_DDR_SPACE (HIGH)
RUN_START(__SVC_STACK_START)
RUN_END(__SVC_STACK_END)
}
/*
* This file is AUTO GENERATED by PyTI_PSDK_RTOS tool.
* It is NOT recommended to manually edit this file
*/
/*
*
* Copyright (c) 2018 Texas Instruments Incorporated
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* license under copyrights and patents it now or hereafter owns or controls to make,
* have made, use, import, offer to sell and sell ("Utilize") this software subject to the
* terms herein. With respect to the foregoing patent license, such license is granted
* solely to the extent that any such patent is necessary to Utilize the software alone.
* The patent license shall not apply to any combinations which include this software,
* other than combinations with devices manufactured by or for TI ("TI Devices").
* No hardware patent is licensed hereunder.
*
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* (including the above copyright notice and the disclaimer and (if applicable) source
* code license limitations below) in the documentation and/or other materials provided
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* that the following conditions are met:
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*/
MEMORY
{
MCU_R5F_TCMA_VECS (X) : ORIGIN = 0x00000000 LENGTH = 0x00000040
MCU_R5F_TCMA (X) : ORIGIN = 0x00000040 LENGTH = 0x00007FC0
MCU_R5F_TCMB_VECS (X) : ORIGIN = 0x41010000 LENGTH = 0x00000040
MCU_R5F_TCMB (X) : ORIGIN = 0x41010040 LENGTH = 0x00007FC0
/*========================J721S2 MCMS3 LOCATIONS ===================*/
/*---------- J721S2 Reserved Memory for ARM Trusted Firmware -------*/
// MSMC3_BOOT_R5F0 (RWX) : ORIGIN = 0x70008000, LENGTH = 0x00002000 /* 8KB */
/*======================= J721S2 DDR LOCATION =======================*/
// DDR0 (RWX) : ORIGIN = 0x82000000, LENGTH = 0x02000000 /* 32MB */
/* DDR for MCU1_0 for Linux IPC [ size 1024.00 KB ] */
// DDR_MCU1_0_IPC ( RWIX ) : ORIGIN = 0x82000000 , LENGTH = 0x00100000
/* DDR for MCU1_0 for Linux resource table [ size 1024 B ] */
// DDR_MCU1_0_RESOURCE_TABLE ( RWIX ) : ORIGIN = 0x82100000 , LENGTH = 0x00000400
/* DDR for MCU1_0 for code/data [ size 15.00 MB ] */
// DDR_MCU1_0 ( RWIX ) : ORIGIN = 0x82100400 , LENGTH = 0x01EFFC00
/* Memory for remote core logging [ size 256.00 KB ] */
// APP_LOG_MEM : ORIGIN = 0x98000000 , LENGTH = 0x00040000
/* Memory for TI OpenVX shared memory. MUST be non-cached or cache-coherent [ size 63.75 MB ] */
// TIOVX_OBJ_DESC_MEM : ORIGIN = 0x98040000 , LENGTH = 0x03FC0000
/* DDR for MCU1_0 for local heap [ size 12.00 MB ] */
// DDR_MCU1_0_LOCAL_HEAP ( RWIX ) : ORIGIN = 0x9D000000 , LENGTH = 0x00C00000
MCU1_0_IPC_DATA (RWIX) : ORIGIN = 0xA0000000 LENGTH = 0x00100000
MCU1_0_EXT_DATA (RWIX) : ORIGIN = 0xA0100000 LENGTH = 0x00100000
MCU1_0_R5F_MEM_TEXT (RWIX) : ORIGIN = 0xA0200000 LENGTH = 0x00100000
MCU1_0_R5F_MEM_DATA (RWIX) : ORIGIN = 0xA0300000 LENGTH = 0x00100000
MCU1_0_DDR_SPACE (RWIX) : ORIGIN = 0xA0400000 LENGTH = 0x00C00000
/* Memory for IPC Vring's. MUST be non-cached or cache-coherent [ size 32.00 MB ] */
IPC_VRING_MEM : ORIGIN = 0xA8000000 , LENGTH = 0x02000000
/* Memory for shared memory buffers in DDR [ size 64.00 MB ] */
DDR_SHARED_MEM : ORIGIN = 0xAA000000 , LENGTH = 0x04000000
}