EMIF初始化完成后,FPGA写自加数数据,从DSP端看地址数据,偶数段地址的数据都丢失,如下图所示:
EMIFA23---A0
EMIFA0 ---A1
EMIFA1 ---A2
。。。
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您好,你介绍下 您是如何解决你这个EMIF 操作只有一半地址有数据,另一半地址没有数据的现象的吗?我目前也碰到了类似的问题,望赐教,谢谢!