您好~使用6678EVM调一个程序,当把.out文件load进去后,会出现如图所示的错误!希望各位帮忙解决下!谢谢~~~(附件中包括错误提示和相应工程的MAP,CMD文件!)
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你好!
建议你使用MCSDK中的一个小程序进行硬件仿真,从而可以确定是程序编写问题还是emulator的问题。
谢谢!
First of all, the error message says that the DSP core (the core0) lost its functional clock. The .jpg file shows, the error occurs during running the GEL file (not loading the .out file).
So, can you provide the GEL file you are using, the .ccxml file for target configuration, as well as more details on what you were doing, such as:
1. Do you see this error for the first time run after a clean start (power cycle the board, start CCS, connect to target, ...)?
2. If you see this error only in between a couple of times run your applications, the problem will be probably related to the application code.
Regards!
Wenzhong Liu
Hobo,
Can you share your .out file? It seems that this is caused by the .out file.
By the way, did you manually do the Debug->Restart after you load the .out file? Also, can you provide the information shown on the console window during loading the .out file?
My computer doesn't support typing Chinese, but it has no problem to display it. So, I don't mind your using chinese, and you should not mind my using english, deal? (I am joking).
Regards!
Wen
Hobo,
I did some simple test on my own evm with my own .out file. Now, I guess, the problem that you have occurs during the go_main call. That is, after CCS loads the .out into memory, and it will issue an go-main() command automatically.
To verify this assumption, you should turn off the “auto run” feature in CCS. In this way, after CCS load a .out file into memory, CCS won’t run any part of the .out file, and for most applications, the PC will point to the entrance point of the code – “_c_int00”. Then, you can either issue:
1. Manually do the go-main, by “Run -> go_main()”. Normally, the CCS will stop at the start point of your main() code. In your case, you should see the problem happens after you issue the go_main().
2. If item1 is true, then, I guess the problem is with your PROJECT – you might use wrong DSP type, or link to wrong rtslib.
Here is the step to disable the go_main() function after load (see the attached jpg file):
1. Similar as you manually load a GEL file. Click on the target (DSP).
2. Tools->Debugger Options -> Generic Debugger Options.
3. Click on the Generic Debugger Options, you should see all the options.
4. Make sure this options is for 66XX DSP cores.
5. In those options, find the Auto Run Options, and disable run to main, “On a program load or restart”

Regards!
Wen
Hobo,
Just tried your .out file on my board (Rev.2A, with XDS560v2 on it), and it worked fine. You also mentioned that this is more like an instable issue, something might be wrong with your board or board setting, which might cause some part of memory unstable (DDR?).
Currently, my board setting is NO-BOOT mode (see http://processors.wiki.ti.com/index.php/TMDXEVM6678L_EVM_Hardware_Setup). F.Y.I, I copied the table here (see the one highlighted in RED):
| Boot Mode |
DIP SW3 (Pin1, 2, 3, 4) |
DIP SW4 (Pin1, 2, 3, 4) |
DIP SW5 (Pin1, 2, 3, 4) |
DIP SW6 (Pin1, 2, 3, 4) |
|---|---|---|---|---|
| IBL NOR boot on image 0 (default) | (off, off, on, off)1,2 | (on, on, on, on)3 | (on, on, on, off)4 | (on, on, on, on) |
| IBL NOR boot on image 1 | (off, off, on, off) | (off, on, on, on) | (on, on, on, off) | (on, on, on, on) |
| IBL NAND boot on image 0 | (off, off, on, off) | (on, off, on, on) | (on, on, on, off) | (on, on, on, on) |
| IBL NAND boot on image 1 | (off, off, on, off) | (off, off, on, on) | (on, on, on, off) | (on, on, on, on) |
| IBL TFTP boot | (off, off, on, off) | (on, on, off, on) | (on, on, on, off) | (on, on, on, on) |
| I2C POST boot | (off, off, on, off) | (on, on, on, on) | (on, on, on, on) | (on, on, on, on) |
| ROM SPI Boot8 | (off, on, off, off) | (on, on, on, on) | (on, on, off, on) | (on, on, on, on) |
| ROM SRIO Boot5 | (off, off, on, on) | (on, on, on, off) | (on, off, on, off) | (off, on, on, on) |
| ROM Ethernet Boot6 | (off, on, off, on) | (on, on, on, off) | (on, on, off, off) | (off, on, on, on) |
| ROM PCIE Boot7 | (off, on, on, off) | (on, on, on, on) | (on, on, on, off) | (off, on, on, on) |
| No boot | (off, on, on, on) | (on, on, on, on) | (on, on, on, on) | (on, on, on, on) |
Can you make sure we used the same boot mode?
Regards!
Wen
Hobo,
By the way, to get the Debugger Options, you have to hightlight on one of the DSP core (in the debug window) first. That is what the STEP1 (shown in the picture I sent) means to.
Regards!
Wen
Hobo,
Since CCS4.x, many CCS windows are content sensitive (depends on which target you are currently debugging on). For example, for a register window, you have to click on a core in the debug window first, and the content of the register window is always associated to the debug target you currently selected (click on).
Similarly, the Tools options are also target sensitive. If you want to re-configure some debug feature preference via the Tools->Debug Options, you need to select the target first by clicking (not highlight) on the target first.
Back to your problem, it seems a unstable issue (your board) since the .out file works fine with my board, and you see it works too sometime. Which version of the evm board your are using? Mine is rev2A. I got the latest GEL file for 6678 board, and I was told, it works more reliable in configuring DDR for some early version of EVM. Maybe you should try it too.
Regards!
Wen