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请教DSP C6743 通过EMIFA接口读写CPLD,听别人说要在DSP里做好译码,就是cpld识别识别dsp的地址信号,请问这是什么意思??



能否举例说明

  • 你好,C6743的EMIFA可以发出的异步访问时序,

    6.10.1 EMIFA Asynchronous Memory Support
    EMIFA supports asynchronous:
    • SRAM memories
    • NAND Flash memories
    • NOR Flash memories

    你可以在CPLD中设计一能接受上述接口的缓存便可。这部分内容应该是FPGA、CPLD部分的知识,可网上查一下。