在使能 L1、L2 缓存后,upp Channel A的window发送完成中断仍然可以正常进入,但是示波器检测到的UPP_CH1_D0管脚的电平,一直是低电平。
备注:
②使能 L1、L2 缓存后,如果upp的内部DMA所发送的数据在256KB L2 共享内置 RAM( o = 0x11800000 l = 0x00040000),那么检测到的UPP_CH1_D0的电平,也是正常的。
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是因为开了Cache后,CPU对buffer的操作结果存在Cache里,没有更新到DDR,需要在写buffer后加一个Cache write back操作。
int main(void)
{
//CacheEnableMAR((unsigned int)0xC0000000, (unsigned int)0x20000000);
//CacheEnable(L1DCFG_L1DMODE_32K | L1PCFG_L1PMODE_32K | L2CFG_L2MODE_256K);
int i;
// ϵͳ³õʼ»¯
sys_init();
// ³õʼ»¯Òª·¢Ë͵ÄÊý¾Ý
UARTPuts("\tInitialize data buffers...\r\n", -2);
// Initialize data buffers
//upp_buffer[0] = 0x68;
for (i = 0; i < UPP_FRAME_SIZE; i++)
{
upp_buffer[i] = i % 2;
}
//upp_buffer[UPP_FRAME_SIZE - 1] = 0x0;
upp_reg_hdl->UPID0 = (Uint32)upp_buffer;
upp_reg_hdl->UPID1 = ((Uint32)UPP_LINE_COUNT << 16) | (Uint32)UPP_FRAME_SIZE * sizeof(Int8);
upp_reg_hdl->UPID2 = (Uint32)UPP_LINE_OFFSET * sizeof(Int8);
while(1);
}