spruh77a.pdf 《OMAP-L138 DSP+ARM Processor Technical Reference Manual》文档中31.2.2 Architecture – Watchdog Timer Mode提到
This section describes the use of the timer as a watchdog timer. In order to fully function in watchdogtimer mode, the timer must be internally connected to the device hardware reset signal.
31.2.2.1 Watchdog Timer中又提到这样的内容：
When the timeout event occurs, the watchdog timer resets the entire processor.
31.1.2 Features中提到这样的内容：
Generates interrupts to CPU • Generates sync events to DMA • Generates output event to device reset (watchdog only) • Generates output event to timer output pins (if pins are available) • External event capture via timer input pins (if pins are available)
So，综合上面的内容理解，WatchDog发生超时时产生硬件复位是自动完成的，且不需要外部连接（TM64P_OUT12）到CPU硬件复位引脚？如果是这样，
今天我按文档要求配置WatchDog后，查看Watchdog Timer Control Register (WDTCR)寄存器，Bit15 WDFLAG标记已经发生超时，但是CPU并没有发生复位。
麻烦哪位使用过的朋友，帮忙解释一下？
