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Debug I2C



Hi:

     Recently I debug I2C driver,when I do read operation,sometimes the last byte can't receive.Such as I read four bytes,I can only read three bytes .   

Hardware platform:CPU:DM6467

                                          kernel:2.6.18

                                          FPGA:ep2c35f484c8

   When I use the  CPU DM6467T,Above problem does not occur。

  • Hi Tom,

                 Sorry, I can't run your code in Hardware of DM6467 recently, because I do not have the TMDXEVM6467T in my  work place, So I just can read you code and the datasheet.

    There are two suggestion:

              1. The ICPSC register set the prescaled module clock operation frequency,whose range is 6.7M to13.3 MHz.

                   Prescaled Module Clock Frequency = PLL1 Output Frequency / (IPSC + 1).

                   I2C serial clock frequency = prescaled module clock frequency/(ICCL + d) + (ICCH + d)

                   I2C serial clock frequency's range is 10K~400K

                You can verify the  ICPSC,ICCLKL,ICCLKH register to set those clock right      

             2. If you programme FPGA in VHDL,you could send the IIC Module's code to me, and  I can verify your IIC Module of FPGA  

            The different between DM6467 and  DM6467T are DSP & ARM's Max clock and whether supporting usb ,So I think the phenomenon of your problem is due to time sequence.

            If the problem don't be solved,please feel free to contact me. I will try my best to help you!

    best regards

    Charles Cao

  • Hi Tom,

                Sorry, I can't run your code in Hardware of DM6467 recently, because I do not have the TMDXEVM6467T in my  work place, So I just can read you code and the datasheet.

    There are two suggestion:

             1. The ICPSC register set the prescaled module clock operation frequency,whose range is 6.7M to13.3 MHz.

                  Prescaled Module Clock Frequency = PLL1 Output Frequency / (IPSC + 1).

                  I2C serial clock frequency = prescaled module clock frequency/(ICCL + d) + (ICCH + d)

                  I2C serial clock frequency's range is 10K~400K

               You can verify the  ICPSC,ICCLKL,ICCLKH register to set those clock right      

            2. If you programme FPGA in VHDL,you could send the IIC Module's code to me, and  I can verify your IIC Module of FPGA  

           The different between DM6467 and  DM6467T are DSP & ARM's Max clock and whether supporting usb ,So I think the phenomenon of your problem is due to time sequence.

           If the problem don't be solved,please feel free to contact me. I will try my best to help you!

    best regards

    Charles Cao

  • hi  Cao,

                  MY programme FPGA in verilog,I2C work in the 80K clock frequency.I'm not even once read at the data, but the probability is small, many times one less clock

                  Thinks!

                                                                                                                                                                        TOM