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o Bitstream Buffer (SR1) – Shared Region 1. This shared region is meant to receive encoded bitstream from Video M3 processor to A8 processor, send bitstream from A8 to Video M3 for decoding and for sharing the buffers between A8 and DSP for Scene Change Detection algorithm results. This region is cached on A8.
o Frame Buffer (SR2) – Shared Region 2. This shared region is used for allocating frame buffers for capturing video data, scaling, displaying video frames. The shared region is accessible from A8, Video M3, VPSS M3 and DSP. This is non-tiled region.
