您好:
我现在在单板上用单片的6638,这样HEPERLINK就是未用的状态。手册有描述
All HyperLink clock and data pins (HYPLNKnRXFLCLK, HYPLNKnRXFLDAT,
HYPLNKnTXFLCLK, HYPLNKnTXFLDAT, HYPLNKnRXPMCLK,
HYPLNKnRXPMDAT, HYPLNKnTXPMCLK, HYPLNKnTXPMDAT) can be left
floating when the entire HyperLink peripheral is not used. Each unused HyperLink
clock and data pin will be pulled low when not in use through internal pull-down
resistors
以及
If unused, the primary HyperLink clock input must be configured as indicated in
Section 3.3, Figure 15. Pull-up must be to the CVDD core supply.
主要有疑问的有如上标红色的字体,若我外部不加下拉的话,是否可以通过内部寄存器配置内部的下拉?若是外部加下拉的话是收发都得加?
如上,多谢大家。