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各位,有没有AM335x同时使用NAND 与NOR的程序,也就是GPMC的两个片选同时使用。我就想看看这块怎么写的
我们的SDK目前只支持GPMC-NAND的驱动,如果GPMC还要接别的外设,可以参考NAND驱动编写。
网上应该有GPMC同时用NAND和FPGA的例程。
我是再UBOOT中进行测试的,因为发现UBOOT里面的代码容易看懂一点,所以就和NAND初始化一起,加了外接SRAM的初始化,然后直接再UBOOT中操作外部SRAM的地址,看是否能读写成功,代码如下:
#if defined(CONFIG_SRAM) #define CONFIG_EXT_SRAM_BASE (0x5000000) #define CONFIG_EXT_SRAM #endif
#define M_SRAM_GPMC_CONFIG1 0x28601000 #define M_SRAM_GPMC_CONFIG2 0x00011001 #define M_SRAM_GPMC_CONFIG3 0x00020201 #define M_SRAM_GPMC_CONFIG4 0x08031003 #define M_SRAM_GPMC_CONFIG5 0x000F1111 #define M_SRAM_GPMC_CONFIG6 0x0F030080 #define M_SRAM_GPMC_CONFIG7 0x00000000
#if defined(CONFIG_EXT_SRAM) static const u32 gpmc_sram[GPMC_MAX_REG] = { M_SRAM_GPMC_CONFIG1, M_SRAM_GPMC_CONFIG2, M_SRAM_GPMC_CONFIG3, M_SRAM_GPMC_CONFIG4, M_SRAM_GPMC_CONFIG5, M_SRAM_GPMC_CONFIG6, M_SRAM_GPMC_CONFIG7, }; #endif
#ifdef CONFIG_EXT_SRAM /*SRAM - CS1*/ gpmc_config = gpmc_sram; base = CONFIG_EXT_SRAM_BASE; size = GPMC_SIZE_16M; enable_gpmc_cs_config(gpmc_config, &gpmc_cfg->cs[1], base, size); writel(0x00000a00, 0x50000050); #endif
Uboot中原来的NAND 管脚配置
static struct module_pin_mux nand_pin_mux[] = { {OFFSET(gpmc_ad0), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD0 */ {OFFSET(gpmc_ad1), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD1 */ {OFFSET(gpmc_ad2), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD2 */ {OFFSET(gpmc_ad3), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD3 */ {OFFSET(gpmc_ad4), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD4 */ {OFFSET(gpmc_ad5), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD5 */ {OFFSET(gpmc_ad6), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD6 */ {OFFSET(gpmc_ad7), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD7 */ {OFFSET(gpmc_wait0), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* NAND WAIT */ {OFFSET(gpmc_wpn), (MODE(7) | PULLUDDIS | RXACTIVE)}, /* NAND_WPN */ {OFFSET(gpmc_csn0), (MODE(0) | PULLUDDIS)}, /* NAND_CS0 */ {OFFSET(gpmc_advn_ale), (MODE(0) | PULLUDEN)}, /* NAND_ADV_ALE */ {OFFSET(gpmc_oen_ren), (MODE(0) | PULLUDEN)}, /* NAND_RE */ {OFFSET(gpmc_wen), (MODE(0) | PULLUDEN)}, /* NAND_WEN */ {OFFSET(gpmc_be0n_cle), (MODE(0) | PULLUDEN)}, /* NAND_BE_CLE */ {-1}, };
添加的管脚配置,因为和NAND有一部分是共用的,所以没有重复配置
static struct module_pin_mux sram_pin_mux[] = { {OFFSET(gpmc_ad8), (MODE(0) | PULLUP_EN | RXACTIVE)}, {OFFSET(gpmc_ad9), (MODE(0) | PULLUP_EN | RXACTIVE)}, {OFFSET(gpmc_ad10), (MODE(0) | PULLUP_EN | RXACTIVE)}, {OFFSET(gpmc_ad11), (MODE(0) | PULLUP_EN | RXACTIVE)}, {OFFSET(gpmc_ad12), (MODE(0) | PULLUP_EN | RXACTIVE)}, {OFFSET(gpmc_ad13), (MODE(0) | PULLUP_EN | RXACTIVE)}, {OFFSET(gpmc_ad14), (MODE(0) | PULLUP_EN | RXACTIVE)}, {OFFSET(gpmc_ad15), (MODE(0) | PULLUP_EN | RXACTIVE)}, {OFFSET(gpmc_csn1), (MODE(0) | PULLUDDIS)}, {OFFSET(gpmc_clk),(MODE(0) | PULLUDDIS)}, {OFFSET(gpmc_a0), (MODE(1) | PULLUDDIS)}, {OFFSET(gpmc_a1), (MODE(1) | PULLUDDIS)}, {OFFSET(gpmc_a2), (MODE(1) | PULLUDDIS)}, {OFFSET(gpmc_a3), (MODE(1) | PULLUDDIS)}, {OFFSET(gpmc_a4), (MODE(1) | PULLUDDIS)}, {OFFSET(gpmc_a5), (MODE(1) | PULLUDDIS)}, {OFFSET(gpmc_a6), (MODE(1) | PULLUDDIS)}, {OFFSET(gpmc_a7), (MODE(1) | PULLUDDIS)}, {OFFSET(gpmc_a8), (MODE(1) | PULLUDDIS)}, {OFFSET(gpmc_a9), (MODE(1) | PULLUDDIS)}, {OFFSET(gpmc_a10), (MODE(1) | PULLUDDIS)}, {OFFSET(gpmc_a11), (MODE(1) | PULLUDDIS)}, {OFFSET(lcd_data8), (MODE(1) | PULLUDDIS)}, {OFFSET(lcd_data9), (MODE(1) | PULLUDDIS)}, {OFFSET(lcd_data10), (MODE(1) | PULLUDDIS)}, {OFFSET(lcd_data11), (MODE(1) | PULLUDDIS)}, {-1}, }; 最后在board_init_r函数的最后面,调用main_loop();之前,加入了如下的代码进行测试,因为前面已经完成了初始化了。
printf("print now-----4--------------------------\n"); sramaddr = (unsigned int *)0x5000002; printf("print now-----41--------------------------\n"); printf("address: 0x%x \n", (unsigned int)sramaddr); printf("data: 0x%x\n", *sramaddr); /* main_loop() can return to retry autoboot, if so just run it again. */ for (;;) { main_loop(); }
执行起来发现,每次打印到printf("address: 0x%x \n", (unsigned int)sramaddr);这一句,打印出来address:0x5000002就停止了,后面也不会进行内核加载了。
但是如果我把这个地址0x5000002换成 了0x82000000,就可以正确执行,也能打印出这个地址上的内容,可以加载内核。因为0x82000000是片上的RAM空间。
帮我看下我这么写没问题吧?
另外还有个疑问:1. NAND和外部SRAM的gpmc_ad0--gpmc_ad7是共用的,这个有问题吗?
2. 读0x82000000就会正常执行,而0x5000002就不行,是什么原因?
0x82000000确实是,外部DDR的地址,但我直接操作是可以的,不会出现问题。
0x5000002这个地址,是我在配置GPMC的时候,CS1的基地址我配置的为:0x5000000,所以我读写CS1外接的SRAM,就读写了一个0x5000002
另外我检查了下,之前的管脚配置可能出现了一点错误,现在改成如下:
static struct module_pin_mux sram_pin_mux[] = { {OFFSET(gpmc_ad8), (MODE(0) | PULLUP_EN | RXACTIVE)}, {OFFSET(gpmc_ad9), (MODE(0) | PULLUP_EN | RXACTIVE)}, {OFFSET(gpmc_ad10), (MODE(0) | PULLUP_EN | RXACTIVE)}, {OFFSET(gpmc_ad11), (MODE(0) | PULLUP_EN | RXACTIVE)}, {OFFSET(gpmc_ad12), (MODE(0) | PULLUP_EN | RXACTIVE)}, {OFFSET(gpmc_ad13), (MODE(0) | PULLUP_EN | RXACTIVE)}, {OFFSET(gpmc_ad14), (MODE(0) | PULLUP_EN | RXACTIVE)}, {OFFSET(gpmc_ad15), (MODE(0) | PULLUP_EN | RXACTIVE)}, {OFFSET(gpmc_csn1), (MODE(0) | PULLUDDIS)}, {OFFSET(gpmc_clk),(MODE(0) | PULLUDDIS)}, {OFFSET(lcd_data0), (MODE(1) | PULLUDDIS)}, {OFFSET(lcd_data1), (MODE(1) | PULLUDDIS)}, {OFFSET(lcd_data2), (MODE(1) | PULLUDDIS)}, {OFFSET(lcd_data3), (MODE(1) | PULLUDDIS)}, {OFFSET(lcd_data4), (MODE(1) | PULLUDDIS)}, {OFFSET(lcd_data5), (MODE(1) | PULLUDDIS)}, {OFFSET(lcd_data6), (MODE(1) | PULLUDDIS)}, {OFFSET(lcd_data7), (MODE(1) | PULLUDDIS)}, {OFFSET(lcd_vsync), (MODE(1) | PULLUDDIS)}, {OFFSET(lcd_hsync), (MODE(1) | PULLUDDIS)}, {OFFSET(lcd_pclk), (MODE(1) | PULLUDDIS)}, {OFFSET(lcd_ac_bias_en), (MODE(1) | PULLUDDIS)}, {OFFSET(lcd_data8), (MODE(1) | PULLUDDIS)}, {OFFSET(lcd_data9), (MODE(1) | PULLUDDIS)}, {OFFSET(lcd_data10), (MODE(1) | PULLUDDIS)}, {OFFSET(lcd_data11), (MODE(1) | PULLUDDIS)}, {OFFSET(mii1_txclk),(MODE(7) | PULLUP_EN | RXACTIVE)}, {OFFSET(mii1_txd3),(MODE(7) | PULLUP_EN | RXACTIVE)}, {OFFSET(mii1_txd2),(MODE(7) | PULLUP_EN | RXACTIVE)}, {OFFSET(mii1_col),(MODE(7) | PULLUP_EN | RXACTIVE)}, {-1}, };
但是出现的问题还是一样的。
你好:
我们现在的项目,遇到了读取EEPROM只能读到头地址数据的问题吗。问题描述与你发表在 2013年关于I2C读取失败的问题 于 其他DSP & ARM® 产品.是完全一致。请问您当时是怎么解决这个问题的?