In the following figure, I configured the registers so that SYSCLKOUT0 was 1MHZ, but the frequency of the corresponding pin I measured was 4MHZ, as if the value of sysclkout_clk in front of it did not divide by 4. May I ask how this happened? Is there any other registers to configure?
您好
您能否发送配置文件以便我们可以复制和调查您看到的问题？
您是否还可以使用 ccs_register_dump.gel 或 linux_register_dump.py 来转储可导入到该工具中的 PLL 配置寄存器？
