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DM368板子更换镁光256M内存后,修改UBL和u-boot内存参数问题



www.deyisupport.com/.../249121.aspx

上面的链接是公司DM368换了不同大小不同厂商内存后,不能运行系统的问题,判断是换了内存厂商后,内存参数需要重新配置的问题。

根据下面的链接中:

www.deyisupport.com/.../69143.aspx

某位TI员工生成的“2047.DM368_mDDR_DDR2_Memory_Controller_Register_Calc.xlsx”来计算的寄存器值,但是编译UBL后烧写到板子,运行到:

    DM36x initialization passed!
    TI UBL Version: 1.50
    Booting Catalog Boot Loader
    BootMode = NAND
    Starting NAND Copy...

停止了。不知道是什么问题,自己初步判断,还是DDR参数配置的问题。我在psp/flash-utils/DM36x/Common/src/device.c中改的DEVICE_DDR2Init()函数代码如下:

Uint32 DEVICE_DDR2Init()
{
    Uint32 tRFC, tRP, tRCD, tWR, tRAS, tRC, tRRD, tWTR;

    DEVICE_LPSCTransition(LPSC_DDR2, 0, PSC_ENABLE);
 
    SYSTEM->VTPIOCR = (SYSTEM->VTPIOCR) & 0xFFFF9F3F;
 
    // Set bit CLRZ (bit 13)
    SYSTEM->VTPIOCR = (SYSTEM->VTPIOCR) | 0x00002000;
 
    // Check VTP READY Status
    while( !(SYSTEM->VTPIOCR & 0x8000));
 
    // Set bit VTP_IOPWRDWN bit 14 for DDR input buffers)
    // SYSTEM->VTPIOCR = SYSTEM->VTPIOCR | 0x00004000;
 
    // Set bit LOCK(bit7) and PWRSAVE (bit8)
    SYSTEM->VTPIOCR = SYSTEM->VTPIOCR | 0x00000080;
    
    // Powerdown VTP as it is locked (bit 6)
    // Set bit VTP_IOPWRDWN bit 14 for DDR input buffers)
    SYSTEM->VTPIOCR = SYSTEM->VTPIOCR | 0x00004040;
 
    // Wait for calibration to complete
    UTIL_waitLoop( 150 );
 
    // Set the DDR2 to synreset, then enable it again
    DEVICE_LPSCTransition(LPSC_DDR2, 0, PSC_SYNCRESET);
    DEVICE_LPSCTransition(LPSC_DDR2, 0, PSC_ENABLE);
    
     DDR->DDRPHYCR = 0x000000C6;  // qing, 0x000000C5 to 0x000000C6

    DDR->SDBCR = 0x00574832;  // qing, 0x00534832 to 0x00574A30
    DDR->SDBCR = 0x0057C832;  // qing, 0x0053C832 to 0x0057CA30; Set the TIMUNLOCK to write into the TMR reg
          
    /*
    tRFC = DDR_Get_Val(DDR_T_RFC, DDR_FREQ);
    tRP  = DDR_Get_Val(DDR_T_RP, DDR_FREQ);
    tRCD = DDR_Get_Val(DDR_T_RCD, DDR_FREQ);
    tWR  = DDR_Get_Val(DDR_T_WR, DDR_FREQ);
    tRAS = DDR_Get_Val(DDR_T_RAS, DDR_FREQ);
    tRC  = DDR_Get_Val(DDR_T_RC, DDR_FREQ);
    tRRD = DDR_Get_Val(DDR_T_RRD, DDR_FREQ);
    tWTR = DDR_Get_Val(DDR_T_WTR, DDR_FREQ);
    
    DDR->SDTIMR =    tRFC << 25    |
                     tRP  << 22    |
                     tRCD << 19    |
                     tWR  << 16    |
                     tRAS << 11    |
                     tRC  << 6    |
                     tRRD << 3    |
                     tWTR << 0;
    
    DDR->SDTIMR2 =  ((DDR_T_RASMAX / (DDR_RR * DDR_FREQ)) << 27) |
                    (DDR_T_XP << 25 )    |
                    (((DDR_T_XSNR * DDR_FREQ) / 10000) << 16)   |
                    (DDR_T_XSRD << 8)    |
                    (((DDR_T_RTP * DDR_FREQ) / 10000) << 5)  |
                    (DDR_T_CKE << 0);
    */

    DDR->SDTIMR = 0x33256C88;  // qing
    DDR->SDTIMR2 = 0x7C1CC742;  // qing

    DDR->SDBCR = 0x00574832;  // qing, 0x00534832 to 0x00574832; Reset the TIMUNLOCK TMR Write Disable

    DDR->PBBPR = 0x000000FE;  //
    
    DDR->SDBCR = 0x00D74A32;  // qing, 0x00D34A32 to 0x00D74A32; Enable DDR2 and DDR and SDram. Write '1' to BOOTUNLOCK

    DDR->SDBCR = 0x00574A32;  // qing, 0x00534A32 to 0x00574A32; Enable DDR2 and DDR and SDram. Write '0' to BOOTUNLOCK

    DDR->SDRCR = 1326;  // qing, (DDR_RR * DDR_FREQ) / 10 to 1326; Program SDRAM Refresh Control Registers

    DEVICE_LPSCTransition(LPSC_DDR2, 0, PSC_SYNCRESET);
    DEVICE_LPSCTransition(LPSC_DDR2, 0, PSC_ENABLE);

    return E_PASS;
}

    我在附件中附上镁光的DDR芯片手册,请高手帮我看看,我的参数哪里设置错误了!


2Gb_DDR2.pdf