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The DSP has access to 4 ARM interrupt events in the ARM interrupt map: SYSCFG_CHIPINT0, SYSCFG_CHIPINT1, SYSCFG_CHIPINT2, and SYSCFG_CHIPINT3.The ARM has access to 3 DSP interrupt events in the DSP interrupt event map: SYSCFG_CHIPINT2, SYSCFG_CHIPINT3, and NMI.
NOTE: SYSCFG_CHIPINT2 and SYSCFG_CHIPINT3 are essentially for the ARM to interrupt the DSP. However, these are additionally mapped to the ARM interrupt controller (AINTC), so that it can be used as debug interrupts, in case there is a need to halt both processors simultaneously.
