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1 第一天调试6657的SRIO和FPGA通信都正常，参考时钟125M
2 在调试过程不可避免的上电断电之类的操做，过两天后在试SRIO的程序发现SRIO的PLL锁定不了，一直处于等待状态
请问大神们这是什么原因造成的
看看周边时钟和电源是否正常，DSP可以做loopback验证。
