您好,请问下图中90%setting、95%setting、99%setting分别是什么意思?
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请看一下下的培训视频。
The table summarizes the optimized timings for a target settling level of 90%, 95%, or 99%. The settling level represents a chip linearity level during start of a chip, when the PLL is settling. The higher than linearity is, the more accurate the results will be.
https://training.ti.com/mmwave-awr1x-power-optimization-options
请选用99% settling
At the start of the chirp the internal circuits (like synthesizer, receiver chain filters etc.) will need some time to settle. The 90/95/99 % settling times indicate the time required for these circuits to settle within the mentioned percentage of the final value. For best performance its recommended to use the 99% settling time numbers.