目前根据查到的资料,在LVDS传输模式下,awr采集到的原始ADC数据被送到了dsp的L3 RAM中,然后看代码时有个HSRAM中也存了result数据,还被发送到了mss,这个HSRAM是不是就是L3呢?
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目前根据查到的资料,在LVDS传输模式下,awr采集到的原始ADC数据被送到了dsp的L3 RAM中,然后看代码时有个HSRAM中也存了result数据,还被发送到了mss,这个HSRAM是不是就是L3呢?
类似于L3,但是不一样。我从其它型号的技术手册上找到了相关描述,参考看一下:
The main use of these memories is to transfer the detected object list to the Master R4F from DSP. L3
shared memory can also be used for the same purpose, but considering the arbitration losses on L3, an
additional memory of various size is kept for the asynchronous access by Cortex R4F without impacting
the throughput, due to any kind of arbitration in the system.