swru599a , Clause 5.3.1 xWRL1432 clock tree
1 MDLL_CLK是什么样的clock source,频率多少,怎么产生的
2 DFE_CLK, RAMPGEN_CLK, ADC_CLK 的clock source是哪个时钟, 是APLL?
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swru599a , Clause 5.3.1 xWRL1432 clock tree
1 MDLL_CLK是什么样的clock source,频率多少,怎么产生的
2 DFE_CLK, RAMPGEN_CLK, ADC_CLK 的clock source是哪个时钟, 是APLL?