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你的问题我怀疑是硬件或者元器件选择不合理
It is highly recommended to follow the reference design when it comes to the components connected to
the DCDC_SW pin. The shunt capacitor following the series inductor from the DCDC_SW pin has to have
a short return path to chip ground from the ground pad (see Section 4.7). A poor DCDC layout could
cause more than 5 dB loss in sensitivity. To check if the sensitivity is limited by the DCDC, turn off the
DCDC in the CCFG.c file.
