CC1352参考BIM在flash区去自己实现一个bootloader,在boot区，当使用过中断后，不能跳转到app区？

////////////////////////////////////////////////////////////////////////////////
// Memory Sizes
////////////////////////////////////////////////////////////////////////////////

define symbol FLASH_BASE            = 0x00000000;
define symbol RAM_BASE              = 0x20000000;
define symbol ROM_BASE              = 0x10000000;

if ( isdefinedsymbol(CC2650) )
{
  define symbol RAM_SIZE            = 0x00005000; // 20K
  define symbol FLASH_SIZE          = 0x00020000; // 128K
  define symbol ROM_SIZE            = 0x0001C000; // 115K
}
else if ( isdefinedsymbol(CC2642) )
{
  define symbol RAM_SIZE            = 0x00014000; // 80K
  define symbol FLASH_SIZE          = 0x00058000; // 352K
  define symbol ROM_SIZE            = 0x00040000; // 256K
}

////////////////////////////////////////////////////////////////////////////////
// Memory Definitions
////////////////////////////////////////////////////////////////////////////////

////////////////////////////////////////////////////////////////////////////////
// RAM
//

//define symbol RESERVED_RAM_SIZE = 0x00000EB3;
define symbol RESERVED_RAM_SIZE = 0x00000ED4;
define symbol RAM_START         = RAM_BASE + 0x0000012C + RESERVED_RAM_SIZE; // PG 2.0 & PG2.1 Agama RAM_START
define symbol RAM_END           = RAM_BASE+RAM_SIZE-1;

////////////////////////////////////////////////////////////////////////////////
// Flash
//
define symbol WORD_SIZE             = 4;

if ( isdefinedsymbol(CC2650) )
{
  define symbol PAGE_SIZE           = 0x1000;
}
else if ( isdefinedsymbol(CC2642) )
{
  define symbol PAGE_SIZE           = 0x2000;
}
export symbol PAGE_SIZE;

if (isdefinedsymbol(PAGE_ALIGN))
{
  define symbol FLASH_MEM_ALIGN     = PAGE_SIZE;
}
else
{
  define symbol FLASH_MEM_ALIGN     = WORD_SIZE;
}

define symbol FLASH_START           = FLASH_BASE;

if ( isdefinedsymbol(CC2650) )
{
  define symbol PAGE_MASK           = 0xFFFFF000;
}
else if ( isdefinedsymbol(CC2642) )
{
  define symbol PAGE_MASK           = 0xFFFFE000;
}

// BIM is allocated at flash sector.
if ( isdefinedsymbol(CC2650) )
{
define symbol FLASH_PAGE_BIMSTART   = 0x50000;//FLASH_BASE + FLASH_SIZE - PAGE_SIZE;
define symbol FLASH_PAGE_BIMEND     = FLASH_BASE + FLASH_SIZE; //0x0001FFFF;
}
else
{
  define symbol FLASH_PAGE_BIMSTART   = 0x50000;//FLASH_BASE + FLASH_SIZE - PAGE_SIZE;
  define symbol FLASH_PAGE_BIMEND     = FLASH_BASE + FLASH_SIZE; //0x0001FFFF;
}

// leaving 4 bytes of buffer between CCFG and veify function pointer
define symbol FLASH_FNPTR_START    = 0x00057fa0;
define symbol FLASH_FNPTR_END      = 0x00057fa3;

//storing cert element in fixed flash region,
//length of region is size of cert_element_t
define symbol CERT_END             = FLASH_FNPTR_START - 1;
define symbol CERT_SIZE            = 0x4C;        // For version 1 ECDSA-P256
define symbol CERT_START           = CERT_END - CERT_SIZE + 1;

////////////////////////////////////////////////////////////////////////////////
// Stack
//

define symbol STACK_SIZE           = 0x400;
define symbol STACK_START          = RAM_END;
define symbol STACK_END            = STACK_START - STACK_SIZE;
define block CSTACK with alignment = 8, size = STACK_SIZE { section .stack };

define symbol STACK_TOP            = RAM_END + 1;
export symbol STACK_TOP;

////////////////////////////////////////////////////////////////////////////////
// Flash Interrupt Vector Table
//

define symbol INTVEC_NUM_ENTRIES   = 50 + 1; // first entry is stack location
define symbol INTVEC_SIZE          = INTVEC_NUM_ENTRIES + 4;

////////////////////////////////////////////////////////////////////////////////
// Memory Regions
////////////////////////////////////////////////////////////////////////////////

define memory mem with size = 4G;

define region RAM                  = mem:[from RAM_START to RAM_END];

define region BIM                  = mem:[from FLASH_PAGE_BIMSTART
                                       to   FLASH_PAGE_BIMEND];

define region FLASH_FN_PTR         = mem:[from FLASH_FNPTR_START
                                       to   FLASH_FNPTR_END];
           
define region CERT_ELEMENT         = mem:[from CERT_START
                                          to CERT_END];

////////////////////////////////////////////////////////////////////////////////
// Memory Placement
////////////////////////////////////////////////////////////////////////////////

// Function pointer table address
place at start of FLASH_FN_PTR   { readonly section .fnPtr };
keep                             { readonly section .fnPtr };

define block CERT                { ro section .cert_element};
keep                             { ro section .cert_element};
place at start of CERT_ELEMENT   { block CERT};

// Interrupt Vector Table
place at address mem:FLASH_PAGE_BIMSTART { readonly section .intvec_boot };
//keep                                     { readonly section .intvec_boot };

// CCFG
place at end of BIM                    { readonly section .ccfg   };
keep                                   { section .ccfg            };

// RAM Vector Table
place at start of RAM                  { section .vtable_ram      };

define block RWDATA { rw };

define section .heap_start            { public heapStart: };
define section .heap_end              { public heapEnd: };
define block   HEAP_END with size = 1 { section .heap_end };

define block END_OF_RAM with fixed order {
                                        block HEAP_END,
                                        block CSTACK
                                      };
place at end of RAM { block END_OF_RAM };

place in RAM { block RWDATA,
               last section .heap_start};

// Stack
//place at end of RAM                    { block CSTACK             };

/* Primary Heap configuration */
//define symbol HEAPSIZE = 2048;
//define block HEAP with alignment = 8, size = HEAPSIZE { };

/* Place heap just before CSTACK */
//place in RAM { block HEAP };
//place in RAM                           { readwrite                };

place in BIM                           { readonly                 };

////////////////////////////////////////////////////////////////////////////////
// Initialization
////////////////////////////////////////////////////////////////////////////////

initialize by copy  { readwrite };

do not initialize
{
  section .noinit,
  section .stack,
};

/* Intvec start */
define symbol FLASH_BASE__ = 0x00000000;
define symbol WORD_SIZE           = 4;
define symbol FLASH_MEM_ALIGN     = WORD_SIZE;

if (!isdefinedsymbol(NVOCMP_NVPAGES)) {
  define symbol NVOCMP_NVPAGES  = 2;
}

/* Memory Regions*/
//define symbol FLASH_SIZE          = 0x00058000; // 352K
//define symbol PAGE_SIZE           = 0x2000;
define symbol FLASH_LAST_base__     = 0x0004C000;//0x0004C000;//(FLASH_SIZE-(PAGE_SIZE*6));// boot
define symbol FLASH_LAST_size__    = 0x00002000;

define symbol FLASH_CCFG_BASE     = 0x00057FA8;
define symbol FLASH_CCFG_SIZE     = 0x00000058;

define symbol FLASH_NV_base__ = (0x4C000 - (NVOCMP_NVPAGES * 0x2000)); // NV Flash base
define symbol FLASH_NV_size__ = (NVOCMP_NVPAGES * 0x2000);
define symbol FLASH_SIZE__    = (0x4C000 - (NVOCMP_NVPAGES * 0x2000));

define symbol RAM_base__           = 0x20000000;
define symbol RAM_size__           = 0x14000;

/* Define a memory region that covers the entire 4 GB addressable space */
define memory mem with size = 4G;

/* Define a region for the on-chip flash */
define region FLASH_region = mem:[from FLASH_BASE__ size FLASH_SIZE__];

/* Define a region for the on-chip flash used for NV storage */
define region FLASH_NV_region = mem:[from FLASH_NV_base__ size FLASH_NV_size__];

/* Define a region for the last flash page */
define region FLASH_last_region__ = mem:[from FLASH_LAST_base__ size FLASH_LAST_size__];

//define a region for ccfg flash
define region FLASH_ccfg_region__ = mem:[from FLASH_CCFG_BASE size FLASH_CCFG_SIZE];

/* Internal RAM for data used by application */
define region RAM_region = mem:[from RAM_base__ size RAM_size__];

/* Place the interrupt vectors at the start of flash */
place at address mem:FLASH_BASE__ { readonly section .intvec };
keep { section .intvec};

/* Place the CCA area at the end of flash */
//place at end of FLASH_last_region__ { readonly section .ccfg };
//place at end of FLASH_ccfg_region__ { readonly section .ccfg };
//keep { section .ccfg };
"AGAMA_CCFG_AREA":
place noload in FLASH_ccfg_region__ { readonly section .ccfg };

place in FLASH_last_region__ { section .text object nvoctp.o  };
place in FLASH_last_region__ { section .text object macTask.o };
place in FLASH_last_region__ { section .text object api_mac.o };
place in FLASH_last_region__ { section .text object osal_port.o };
place in FLASH_last_region__ { section .text object saddr.o };

place in FLASH_region { section .text };

place in FLASH_region { readonly section .const object mac_user_config.o };

place in FLASH_region {
 section .const,
 section .constdata,
 section .rodata,
 section .cinit,
 section .pinit,
 section .init_array,
 section .emb_text
};

/* Place remaining 'read only' in Flash */
place in FLASH_region { readonly };

/* Mark the beginning of the NV Flash page */
place at start of FLASH_NV_region { readonly section .snvSectors };

/* Place .vtable_ram in start of RAM */

place at start of RAM_region { section .vtable_ram };
/*
place in RAM_region  {
 section .data,
 section .bss,
 section .vtable,
 section .vtable_ram,
 section .vtable_ram,
 section .sysmem,
 section .nonretenvar,
};
*/

/*
 * Define CSTACK block to contain .stack section. This enables the IAR IDE
 * to properly show the stack content during debug. Place stack at end of
 * retention RAM, do not initialize (initializing the stack will destroy the
 * return address from the initialization code, causing the processor to branch
 * to zero and fault)
 */
define symbol STACKSIZE = 1024;
define block CSTACK with alignment = 8, size = STACKSIZE { section .stack };

//place at end of RAM_region { block CSTACK };
if (isdefinedsymbol(ROM_TIMACDataAddr)) {
    place at address mem:ROM_TIMACDataAddr {section .data_RAM_BASE_ADDR };
}

/* Export stack top symbol. Used by startup file */
define exported symbol STACK_TOP = end(RAM_region) + 1;

define block RWDATA { rw };

define section .heap_start            { public heapStart: };
define section .heap_end              { public heapEnd: };
define block   HEAP_END with size = 1 { section .heap_end };

define block END_OF_RAM with fixed order {
                                        block HEAP_END,
                                        block CSTACK
                                      };
place at end of RAM_region { block END_OF_RAM };

place in RAM_region { block RWDATA,
               last section .heap_start};

initialize by copy { readwrite };
do not initialize { section .stack, section .noinit};

/*
 * The USE_TIRTOS_ROM symbol is defined internally in the build flow (using
 * --config_def USE_TIRTOS_ROM=1) for TI-RTOS applications whose app.cfg file
 * specifies to use the ROM.
 */
if (isdefinedsymbol(USE_TIRTOS_ROM)) {
    include "TIRTOS_ROM.icf";
}