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CC2642R: CC2642 App程序(rtos),将程序起始地址(FLASH_BASE)改为0x1000,生成hex文件无法运行。

Part Number: CC2642R
Other Parts Discussed in Thread: UNIFLASH

CC2642  App程序(rtos),将程序起始地址(FLASH_BASE)改为0x1000,生成hex文件无法运行。

目前在开发Boot程序,未使用OAD和 自带Bootloader,需要实现定制协议的Boot,通过link 文件 (cc13x2_cc26x2_tirtos.cmd)将App起始地址(FLASH_BASE)修改为0x1000。hex文件刷到板子中,跑不起来。 App起始地址修改为默认的0,hex文件刷进去可以跑起来。请问除了修改cc13x2_cc26x2_tirtos.cmd 里面的地址起始位,还需要修改什么吗?

最终是用Boot程序 JumpToPrgEntry跳到这个地址。 请问这样做是否可以?

  • 将程序起始地址(FLASH_BASE)改为0x1000,生成hex文件无法运行。

    能否给出您的cmd文件?

    建议查看 SDK (<SDK>/examples\nortos\CC26X2R1_LAUNCHXL\bim) 中的 BIM 示例,它们是 TI 的引导加载程序示例。 jumpToPrgEntry() 函数,它实现了跳转例程。

    另外您可以看一下E2E上的相关讨论:

    https://e2e.ti.com/support/microcontrollers/other-microcontrollers-group/other/f/other-microcontrollers-forum/891223/cc2652-changing-the-vector-table-offset-register-and-jumping-to-an-application 

  • 您好,如下是cmd文件:

    /*
    * Copyright (c) 2017-2020, Texas Instruments Incorporated
    * All rights reserved.
    *
    * Redistribution and use in source and binary forms, with or without
    * modification, are permitted provided that the following conditions
    * are met:
    *
    * * Redistributions of source code must retain the above copyright
    * notice, this list of conditions and the following disclaimer.
    *
    * * Redistributions in binary form must reproduce the above copyright
    * notice, this list of conditions and the following disclaimer in the
    * documentation and/or other materials provided with the distribution.
    *
    * * Neither the name of Texas Instruments Incorporated nor the names of
    * its contributors may be used to endorse or promote products derived
    * from this software without specific prior written permission.
    *
    * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    */

    --stack_size=1024 /* C stack is also used for ISR stack */

    HEAPSIZE = 0x4000; /* Size of heap buffer used by HeapMem */

    /* Retain interrupt vector table variable */
    --retain=g_pfnVectors
    /* Override default entry point. */
    --entry_point ResetISR
    /* Allow main() to take args */
    --args 0x8
    /* Suppress warnings and errors: */
    /* - 10063: Warning about entry point not being _c_int00 */
    /* - 16011, 16012: 8-byte alignment errors. Observed when linking in object */
    /* files compiled using Keil (ARM compiler) */
    --diag_suppress=10063,16011,16012

    /* The following command line options are set as part of the CCS project. */
    /* If you are building using the command line, or for some reason want to */
    /* define them here, you can uncomment and modify these lines as needed. */
    /* If you are using CCS for building, it is probably better to make any such */
    /* modifications in your CCS project and leave this file alone. */
    /* */
    /* --heap_size=0 */
    /* --stack_size=256 */
    /* --library=rtsv7M3_T_le_eabi.lib */

    /* The starting address of the application. Normally the interrupt vectors */
    /* must be located at the beginning of the application. */
    #define FLASH_BASE 0x1000
    #define FLASH_SIZE 0x10000
    #define RAM_BASE 0x20000000
    #define RAM_SIZE 0x14000
    #define GPRAM_BASE 0x11000000
    #define GPRAM_SIZE 0x2000


    #define FLASH_CCFG_START 0x00057FA8
    #define FLASH_CCFG_END 0x00057FFF
    #define FLASH_CCFG_SIZE ((FLASH_CCFG_END) - (FLASH_CCFG_START) +1)
    /* System memory map */

    MEMORY
    {
    /* Application stored in and executes from internal flash */
    FLASH (RX) : origin = FLASH_BASE, length = FLASH_SIZE
    FLASH_CCFG(RX) : origin = FLASH_CCFG_START, length = FLASH_CCFG_SIZE
    /* Application uses internal RAM for data */
    SRAM (RWX) : origin = RAM_BASE, length = RAM_SIZE
    /* Application can use GPRAM region as RAM if cache is disabled in the CCFG
    (DEFAULT_CCFG_SIZE_AND_DIS_FLAGS.SET_CCFG_SIZE_AND_DIS_FLAGS_DIS_GPRAM = 0) */
    GPRAM (RWX): origin = GPRAM_BASE, length = GPRAM_SIZE

    /* Explicitly placed off target for the storage of logging data.
    * The data placed here is NOT loaded onto the target device.
    * This is part of 1 GB of external memory from 0x60000000 - 0x9FFFFFFF.
    * ARM memory map can be found here:
    * developer.arm.com/.../about-the-memory-map
    */
    LOG_DATA (R) : origin = 0x90000000, length = 0x40000 /* 256 KB */
    }

    /* Section allocation in memory */

    SECTIONS
    {
    .intvecs : > FLASH_BASE
    .text : >> FLASH
    .TI.ramfunc : {} load=FLASH, run=SRAM, table(BINIT)
    .const : >> FLASH
    .constdata : >> FLASH
    .rodata : >> FLASH
    .binit : > FLASH
    .cinit : > FLASH
    .pinit : > FLASH
    .init_array : > FLASH
    .emb_text : >> FLASH
    .ccfg : > FLASH_CCFG (HIGH)

    .vtable : > SRAM
    .vtable_ram : > SRAM
    vtable_ram : > SRAM
    .data : > SRAM
    .bss : > SRAM
    .sysmem : > SRAM
    .stack : > SRAM (HIGH)
    .nonretenvar : > SRAM
    /* Heap buffer used by HeapMem */
    .priheap : {
    __primary_heap_start__ = .;
    . += HEAPSIZE;
    __primary_heap_end__ = .;
    } > SRAM align 8
    .gpram : > GPRAM
    .log_data : > LOG_DATA, type = COPY
    }