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请教TI的大神们,关于CC1020DCLK脚中断问题

Other Parts Discussed in Thread: CC1020

场景: 现在有A、B两个CC1020的模块,做收发实验;

现象:当我的程序将A模块的 CC1020 设置成接收模式后,无论B模块有没有发送数据,A模块CC1020的DCLK脚一直有中断产生(上升沿有效),

 问题:请问这是由于某个寄存器设置错误造成的吗?正确的应该如何设置?