你好，我想请问下948 的0x1c寄存器，bit0位没有lock可能的原因是什么呢？
| De-Serializer CDR, PLL's clock to recovered clock frequency |
| 1: De-Serializer locked to recovered clock 0: De-Serializer not locked In Dual-link mode, this indicates both channels are locked. |
你好，我想请问下948 的0x1c寄存器，bit0位没有lock可能的原因是什么呢？
| De-Serializer CDR, PLL's clock to recovered clock frequency |
| 1: De-Serializer locked to recovered clock 0: De-Serializer not locked In Dual-link mode, this indicates both channels are locked. |
您好，
如下datasheet截图所示，当PDB驱动为高时，CDR PLL开始锁定串行输入，锁定为三态或低(取决于OUTPUT ENABLE 设置的值)。解串器完成其对输入串行数据的锁定序列后，LOCK 输出将被驱动为高电平，表示从串行输入恢复的有效数据和时钟在LVCMOS和LVDS输出上可用。输出的状态基于OUTPUT ENABLE和OUTPUT SLEEP STATE SELECT寄存器设置。请参阅第7.7节中的寄存器0x02。
如图这个应该怎么配置呢？