lmx2581没有输出

The configuration is OK, schematic is ok except for the loop filter. The calculated loop bandwidth is 21kHz, which is fine. but the phase margin is 337.2 degree, which is not right. I think the problem is when you did the simulation, you did not consider the value of C3, see datasheet 8.3.7 for details.
Please try the following configuration:
OSCin=100MHz or 125MHz
R=4 (if OSCin = 100MHz)
R=5 (if OSCin = 125MHz)
PDF = 25000kHz
CP gain = 3.1mA
C1 = 220pF
C2 = 12nF, R2 = 680ohm
C3 = 2.2nF, R3 = 68ohm
Calculated loop bandwidth = 51.164kHz, phase margin = 43.3 degree

Yeah,i do that exactly as what you said.I have changed the value of the loop filter and calcuted loop bandwidth = 71.49KHz,phase margin = 53.187degrees.But there is still noting on the RFoutA and RFoutB.What's wrong with it?And what's more,even though i have set the wrong loop filter values,there should be something readback on the muxout pin,isn't it?Now,i still cannot see anyting when i program the LD_SELECT as P/2 or N/2 on the LD pin.What do you think of it?

Dear Liu,it's very kind of you for answering my questions one by one.I'm very sorry for not informing you that i have already pulled the output up with a resistor of 51ohm in advance. As to what i have done to get the loop on road,i changed the loop filter values asyou told me!Thanks!And now,i found that when i set the the OUTA_MUX and OUTB_MUX as VCO,there is output on RFoutA as well as RFoutB.But once i set them as channel divider mode,there is no output on both of them,and i suppose that is about why i have no output before!And i know that i  forget to set zero_delay!I always use the channel divider mode instead of VCO directly because of the maximum sample frequency of the oscilloscope i'm using is 4G sa/s.When i set the VCO mode,i get the output by using the spectrum analyzer.I'm so sorry to get you so much trouble.Now i'm wondering how can i configure it with 0 delay mode?The datasheet of lmx2581 present the configuration as following:

I configured it as step 1~6,but unfortunately,the loop wasn't locked.And the light flashed when i configured the LD pin as DLD&Vtune which demonstrate that the pll locked and then lose lock.When i program the PLL_N of R0 at last,the pll stayed unlock.OSCin = 100MHz,R = 5,VCO = 3000MHz,N = 120,VCO_DIV = 6;After programing as normal,I programed as following:

1st kind of configuration:

R0 0x50780000

R5 0x0030AC05

R0 0x503C0000

2nd kind of configuration:

R0 0x50780000

R5 0x0030AC05

R0 0x403C0000

Neither of two kinds of configuration is locked!So,can you tell me how to configuration the 0 delay mode?Thanks for your answer!

Hello carter!Noel Fung said that he will answer my question in your post, and you will let me know his feedback.May i know it?Thank you!

I have no problem with zero delay and channel divider. Here is the procedure:
1. use your original configuration in the first post
2. change the VCO freq to 3000MHz (N becomes 150)
3. change channel divider to 6 (output freq becomes 500MHz)
4. load all register to make it lock (the measured output freq is 500MHz on RFoutA)
5. program NO_FCAL=1
6. program ZERO_DELAY=1 (I can see PLL lose lock)
7. program N=25 (=150/6) (PLL resumes to lock now)

BTW, just found out that the transformer at the RF output is not correct. You should pick a 2:1
transformer.