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[参考译文] CCS/LM3S1968:Pleass 告诉我 DeepSleep 模式和唤醒方法

Guru**** 2347070 points
Other Parts Discussed in Thread: LM3S1968
请注意,本文内容源自机器翻译,可能存在语法或其它翻译错误,仅供参考。如需获取准确内容,请参阅链接中的英语原文或自行翻译。

https://e2e.ti.com/support/microcontrollers/arm-based-microcontrollers-group/arm-based-microcontrollers/f/arm-based-microcontrollers-forum/608957/ccs-lm3s1968-pleass-tell-me-about-deepsleep-mode-and-wake-up-method

器件型号:LM3S1968

工具/软件:Code Composer Studio

我使用了 LM3S1968 MCU。

但我有一些问题。 它在深度睡眠模式中唤醒。

我尝试了 GPIO 中断方法

下面我尝试了内容。

如果 GPIOA 有上升沿、则 CPU 被唤醒。 但不执行任何操作

我们的代码如下

//所有 GPIO 输入

 //HWREG (0x40004400)=0x00000000;   //A PDR  

HWREG (0x40005400)= 0x00000000;   //B PDR   

HWREG (0x40006400)= 0x00000000;   //C PDR  

HWREG (0x40007400)= 0x00000000;   //D PDR  

HWREG (0x40024400)= 0x00000000;   //E PDR  

HWREG (0x40025400)= 0x00000000;   //F PDR  

HWREG (0x40026400)= 0x00000000;   //G PDR  

HWREG (0x40027400)= 0x00000000;   //H PDR   

 //数字禁用  

//HWREG (0x4000451C)= 0x00000000;   //A DS  

HWREG (0x4000551C)= 0x00000000;   //B DS  

HWREG (0x4000651C)= 0x00000000;   //C DS  

HWREG (0x4000751C)= 0x00000000;   //D DS  

HWREG (0x4002451C)= 0x00000000;   //E DS  

HWREG (0x4002551C)= 0x00000000;   //F DS  

HWREG (0x4002651C)= 0x00000000;   //G DS  

HWREG (0x4002751C)= 0x00000000;   //H DS

 //交替放捆  

//HWREG (0x40004420)= 0x00000000;   //A AFSEL  

HWREG (0x40005420)= 0x00000000;   //B AFSEL  

HWREG (0x40006420)= 0x00000000;   /C AFSEL  

HWREG (0x40007420)= 0x00000000;   //D AFSEL

 HWREG (0x40024420)= 0x00000000;   //E AFSEL  

HWREG (0x40025420)= 0x00000000;   //F AFSEL  

HWREG (0x40026420)= 0x00000000;   //G AFSEL

 HWREG (0x40027420)= 0x00000000;   //H AFSEL

  //上拉禁用  

//HWREG (0x40004510)=0x00000000;   //A PUR

HWREG (0x40005510)= 0x00000000;   //B PUR  

HWREG (0x40006510)= 0x00000000;   //C PUR  

HWREG (0x40007510)= 0x00000000;   //D PUR  

HWREG (0x40024510)= 0x00000000;   //E PUR  

HWREG (0x40025510)= 0x00000000;   //F PUR  

HWREG (0x40026510)= 0x00000000;   //G PUR  

HWREG (0x40027510)= 0x00000000;   //H PUR

 //下拉禁用

 //HWREG (0x40004514)=0x00000000;   //A PDR  

HWREG (0x40005514)= 0x00000000;   //B PDR  

HWREG (0x40006514)= 0x00000000;   //C PDR  

HWREG (0x40007514)= 0x00000000;   //D PDR  

HWREG (0x40024514)= 0x00000000;   //E PDR  

HWREG (0x40025514)= 0x00000000;   //F PDR  

HWREG (0x40026514)= 0x00000000;   //G PDR  

HWREG (0x40027514)= 0x00000000;   //H PDR   

SysCtlPeripheralEnable (SYSCTL_Periph_GPIOA);   

SysCtlPeripheralDisable (SYSCTL_Periph_ADC);  

SysCtlPeripheralDisable (SYSCTL_Periph_CAN0);  

SysCtlPeripheralDisable (SYSCTL_Periph_CAN1);  

SysCtlPeripheralDisable (SYSCTL_Periph_CAN2);  

SysCtlPeripheralDisable (SYSCTL_Periph_COMP0);  

SysCtlPeripheralDisable (SYSCTL_Periph_COMP1);  

SysCtlPeripheralDisable (SYSCTL_Periph_Comp2);  

SysCtlPeripheralDisable (SYSCTL_Periph_ETH);  

SysCtlPeripheralEnable (SYSCTL_Periph_GPIOA);  

SysCtlPeripheralDisable (SYSCTL_Periph_GPIOB);  

SysCtlPeripheralDisable (SYSCTL_Periph_GPIOC);  

SysCtlPeripheralDisable (SYSCTL_Periph_GPIOD);  

SysCtlPeripheralDisable (SYSCTL_Periph_GPIOE);  

SysCtlPeripheralDisable (SYSCTL_Periph_GPIOF);  

SysCtlPeripheralDisable (SYSCTL_Periph_GPIOG);  

SysCtlPeripheralDisable (SYSCTL_Periph_GPIOH);  

 SysCtlPeripheralDisable (SYSCTL_Periph_HIBERNATE);  

SysCtlPeripheralDisable (SYSCTL_Periph_I2C0);  

SysCtlPeripheralDisable (SYSCTL_Periph_I2C1);  

SysCtlPeripheralDisable (SYSCTL_Periph_PWM);  

SysCtlPeripheralDisable (SYSCTL_Periph_QEI0);  

SysCtlPeripheralDisable (SYSCTL_Periph_QEI1);  

SysCtlPeripheralDisable (SYSCTL_Periph_SSI0);  

SysCtlPeripheralDisable (SYSCTL_Periph_SSI1);   

 SysCtlPeripheralDisable (SYSCTL_Periph_TIMER0);  

SysCtlPeripheralDisable (SYSCTL_Periph_Timer1);  

SysCtlPeripheralDisable (SYSCTL_Periph_TIMER2);  

SysCtlPeripheralDisable (SYSCTL_Periph_TIMER3);     

SysCtlPeripheralDisable (SYSCTL_Periph_UART0);  

SysCtlPeripheralDisable (SYSCTL_Periph_UART1);  

SysCtlPeripheralDisable (SYSCTL_Periph_UART2);  

SysCtlPeripheralDisable (SYSCTL_Periph_WDOG);

SysCtlLDOSet (SYSCTL_LDO_2_45V);  

SysCtlLDOSet (SYSCTL_LDO_2_40V);  

SysCtlLDOSet (SYSCTL_LDO_2_35V);  

SysCtlLDOSet (SYSCTL_LDO_2_30V);  

SysCtlLDOSet (SYSCTL_LDO_2_25V);   

SysCtlPeripheralDeepSlepEnable (SYSCTL_Periph_GPIOA);  

SysCtlPeripheralDeepSlepDisable (SYSCTL_Periph_ADC);  

SysCtlPeripheralDeepSlepDisable (SYSCTL_Periph_CAN0);  

SysCtlPeripheralDeepSlepDisable (SYSCTL_Periph_CAN1);  

SysCtlPeripheralDeepSlepDisable (SYSCTL_Periph_CAN2);  

SysCtlPeripheralDeepSlepDisable (SYSCTL_Periph_COMP0);  

SysCtlPeripheralDeepSlepDisable (SYSCTL_Periph_COMP1);  

SysCtlPeripheralDeepSlepDisable (SYSCTL_Periph_Comp2);  

SysCtlPeripheralDeepSlepDisable (SYSCTL_Periph_ETH);

SysCtlPeripheralDeepSlepEnable (SYSCTL_Periph_GPIOA);  

SysCtlPeripheralDeepSlepDisable (SYSCTL_Periph_GPIOB);  

SysCtlPeripheralDeepSlepDisable (SYSCTL_Periph_GPIOC);  

SysCtlPeripheralDeepSlepDisable (SYSCTL_Periph_GPIOD);  

SysCtlPeripheralDeepSlepDisable (SYSCTL_Periph_GPIOE);  

SysCtlPeripheralDeepSlepDisable (SYSCTL_Periph_GPIOF);  

SysCtlPeripheralDeepSlepDisable (SYSCTL_Periph_GPIOG);  

SysCtlPeripheralDeepSlepDisable (SYSCTL_Periph_GPIOH);   

SysCtlPeripheralDeepSlepDisable (SYSCTL_Periph_HIBERNATE);  

SysCtlPeripheralDeepSlepDisable (SYSCTL_Periph_I2C0);  

SysCtlPeripheralDeepSlepDisable (SYSCTL_Periph_I2C1);  

SysCtlPeripheralDeepSlepDisable (SYSCTL_Periph_PWM);  

SysCtlPeripheralDeepSlepDisable (SYSCTL_Periph_QEI0);  

SysCtlPeripheralDeepSlepDisable (SYSCTL_Periph_QEI1);  

SysCtlPeripheralDeepSlepDisable (SYSCTL_Periph_SSI0);  

SysCtlPeripheralDeepSlepDisable (SYSCTL_Periph_SSI1);    

SysCtlPeripheralDeepSlepDisable (SYSCTL_Periph_TIMER0);

SysCtlPeripheralDeepSlepDisable (SYSCTL_Periph_Timer1);  

SysCtlPeripheralDeepSlepDisable (SYSCTL_Periph_TIMER2);  

SysCtlPeripheralDeepSlepDisable (SYSCTL_Periph_TIMER3);     

SysCtlPeripheralDeepSlepDisable (SYSCTL_Periph_UART0);  

SysCtlPeripheralDeepSlepDisable (SYSCTL_Periph_UART1);  

SysCtlPeripheralDeepSlepDisable (SYSCTL_Periph_UART2);  

SysCtlPeripheralDeepSlepDisable (SYSCTL_Periph_WDOG);   

 SysCtlPeripheralClockGating (真);  

ulRCC = HWREG (0x400FE060);  

ulRCC |= 0x00000002;  

HWREG (0x400FE060)= ulRCC;   

HWREG (0x400FE144)= 0x1F800030;          //DSLPCLKCFG  

HWREG (0x400FE120)= 0x0;              //DCGC0  

HWREG (0x400FE124)= 0x0;              //DCGC1  

HWREG (0x400FE128)= 0x0;              //DCGC2    

SysCtlDeepSleep ();           //强制 CTL 进入深度睡眠模式。

 

请告诉我在深度睡眠模式中的唤醒方法

 

此致。