大家好、
在实现"FSI_LOOP_POLLING_AM2434-EVM_r5fs"示例时、我收到以下错误。
我对 BOOT0-7的引导选择为"11011110"、对 BOOT8-15的引导选择为"01000000"。
我没有在任何 RAM 或 SD 卡中加载任何固件、只需使用 XDS110调试器实现上述示例。
请帮我解决问题、为什么我遇到上述错误。
等待您的反馈。
--
谢谢、此致、
Divyesh Patel
This thread has been locked.
If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.
大家好、
在实现"FSI_LOOP_POLLING_AM2434-EVM_r5fs"示例时、我收到以下错误。
我对 BOOT0-7的引导选择为"11011110"、对 BOOT8-15的引导选择为"01000000"。
我没有在任何 RAM 或 SD 卡中加载任何固件、只需使用 XDS110调试器实现上述示例。
请帮我解决问题、为什么我遇到上述错误。
等待您的反馈。
--
谢谢、此致、
Divyesh Patel
Kowshik、您好!
感谢您的及时响应。
我已经访问了您提到的链接、但仍然无法进行调试。
现在处于调试阶段、但部分而言、我无法进入"fsi_loopback_solling_am243x_evm_r5ffss0"示例的环回状态。
请查找所附的映像和 linker.cmd 文件以供参考。
/* This is the stack that is used by code running within main() * In case of NORTOS, * - This means all the code outside of ISR uses this stack * In case of FreeRTOS * - This means all the code until vTaskStartScheduler() is called in main() * uses this stack. * - After vTaskStartScheduler() each task created in FreeRTOS has its own stack */ --stack_size=16384 /* This is the heap size for malloc() API in NORTOS and FreeRTOS * This is also the heap used by pvPortMalloc in FreeRTOS */ --heap_size=32768 -e_vectors /* This is the entry of the application, _vector MUST be plabed starting address 0x0 */ /* This is the size of stack when R5 is in IRQ mode * In NORTOS, * - Here interrupt nesting is disabled as of now * - This is the stack used by ISRs registered as type IRQ * In FreeRTOS, * - Here interrupt nesting is enabled * - This is stack that is used initally when a IRQ is received * - But then the mode is switched to SVC mode and SVC stack is used for all user ISR callbacks * - Hence in FreeRTOS, IRQ stack size is less and SVC stack size is more */ __IRQ_STACK_SIZE = 256; /* This is the size of stack when R5 is in IRQ mode * - In both NORTOS and FreeRTOS nesting is disabled for FIQ */ __FIQ_STACK_SIZE = 256; __SVC_STACK_SIZE = 4096; /* This is the size of stack when R5 is in SVC mode */ __ABORT_STACK_SIZE = 256; /* This is the size of stack when R5 is in ABORT mode */ __UNDEFINED_STACK_SIZE = 256; /* This is the size of stack when R5 is in UNDEF mode */ SECTIONS { /* This has the R5F entry point and vector table, this MUST be at 0x0 */ .vectors:{} palign(8) > R5F_VECS /* This has the R5F boot code until MPU is enabled, this MUST be at a address < 0x80000000 * i.e this cannot be placed in DDR */ GROUP { .text.hwi: palign(8) .text.cache: palign(8) .text.mpu: palign(8) .text.boot: palign(8) .text:abort: palign(8) /* this helps in loading symbols when using XIP mode */ } > MSRAM /* This is rest of code. This can be placed in DDR if DDR is available and needed */ GROUP { .text: {} palign(8) /* This is where code resides */ .rodata: {} palign(8) /* This is where const's go */ } > MSRAM /* This is rest of initialized data. This can be placed in DDR if DDR is available and needed */ GROUP { .data: {} palign(8) /* This is where initialized globals and static go */ } > MSRAM /* This is rest of uninitialized data. This can be placed in DDR if DDR is available and needed */ GROUP { .bss: {} palign(8) /* This is where uninitialized globals go */ RUN_START(__BSS_START) RUN_END(__BSS_END) .sysmem: {} palign(8) /* This is where the malloc heap goes */ .stack: {} palign(8) /* This is where the main() stack goes */ } > MSRAM /* This is where the stacks for different R5F modes go */ GROUP { .irqstack: {. = . + __IRQ_STACK_SIZE;} align(8) RUN_START(__IRQ_STACK_START) RUN_END(__IRQ_STACK_END) .fiqstack: {. = . + __FIQ_STACK_SIZE;} align(8) RUN_START(__FIQ_STACK_START) RUN_END(__FIQ_STACK_END) .svcstack: {. = . + __SVC_STACK_SIZE;} align(8) RUN_START(__SVC_STACK_START) RUN_END(__SVC_STACK_END) .abortstack: {. = . + __ABORT_STACK_SIZE;} align(8) RUN_START(__ABORT_STACK_START) RUN_END(__ABORT_STACK_END) .undefinedstack: {. = . + __UNDEFINED_STACK_SIZE;} align(8) RUN_START(__UNDEFINED_STACK_START) RUN_END(__UNDEFINED_STACK_END) } > MSRAM /* Sections needed for C++ projects */ GROUP { .ARM.exidx: {} palign(8) /* Needed for C++ exception handling */ .init_array: {} palign(8) /* Contains function pointers called before main */ .fini_array: {} palign(8) /* Contains function pointers called after main */ } > MSRAM /* General purpose user shared memory, used in some examples */ .bss.user_shared_mem (NOLOAD) : {} > USER_SHM_MEM /* this is used when Debug log's to shared memory are enabled, else this is not used */ .bss.log_shared_mem (NOLOAD) : {} > LOG_SHM_MEM /* this is used only when IPC RPMessage is enabled, else this is not used */ .bss.ipc_vring_mem (NOLOAD) : {} > RTOS_NORTOS_IPC_SHM_MEM /* General purpose non cacheable memory, used in some examples */ .bss.nocache (NOLOAD) : {} > NON_CACHE_MEM } /* NOTE: Below memory is reserved for DMSC usage - During Boot till security handoff is complete 0x701E0000 - 0x701FFFFF (128KB) - After "Security Handoff" is complete (i.e at run time) 0x701F4000 - 0x701FFFFF (48KB) Security handoff is complete when this message is sent to the DMSC, TISCI_MSG_SEC_HANDOVER This should be sent once all cores are loaded and all application specific firewall calls are setup. */ MEMORY { R5F_VECS : ORIGIN = 0x00000000 , LENGTH = 0x00000040 R5F_TCMA : ORIGIN = 0x00000040 , LENGTH = 0x00007FC0 R5F_TCMB0 : ORIGIN = 0x41010000 , LENGTH = 0x00008000 /* memory segment used to hold CPU specific non-cached data, MAKE to add a MPU entry to mark this as non-cached */ NON_CACHE_MEM : ORIGIN = 0x70060000 , LENGTH = 0x8000 /* when using multi-core application's i.e more than one R5F/M4F active, make sure * this memory does not overlap with other R5F's */ MSRAM : ORIGIN = 0x70080000 , LENGTH = 0x40000 /* This section can be used to put XIP section of the application in flash, make sure this does not overlap with * other CPUs. Also make sure to add a MPU entry for this section and mark it as cached and code executable */ FLASH : ORIGIN = 0x60100000 , LENGTH = 0x80000 /* shared memory segments */ /* On R5F, * - make sure there is a MPU entry which maps below regions as non-cache */ USER_SHM_MEM : ORIGIN = 0x701D0000, LENGTH = 0x180 LOG_SHM_MEM : ORIGIN = 0x701D0000 + 0x180, LENGTH = 0x00004000 - 0x180 RTOS_NORTOS_IPC_SHM_MEM : ORIGIN = 0x701D4000, LENGTH = 0x0000C000 }
请帮我解决、我做了什么错。
--
谢谢、此致、
Divyesh Patel
Kowshik、您好!
正确、首先我犯了错误、但后来在 R5_0_0内核中正确加载了它。
实际上、我有定制板、我认为我的问题与以下链接有关
我已经为 BOOT7-0选择了"01111011"、为 BOOT15-8选择了"00000010"、然后按照上面的链接执行操作。 在此过程中、我的代码卡在系统初始化函数中。
首先 、我想、我需要加载初始化脚本、然后我可以调试我的代码。
如果正确、您能否为我提供正确加载的正确顺序。
还请验证我的引导配置。
--
谢谢、此致、
Divyesh Patel
您好、Divyesh、
在该模式下、您必须首先运行 SDK 中存在的 dmsc.js 脚本、以便首先初始化 SoC。 您无法直接连接到 R5内核。 请按照此命令和页面运行 dmsc 脚本。
AM243x MCU+ SDK:EVM 设置(TI.com)
此脚本运行后、您应该能够连接到 R5内核。
谢谢、
G Kowshik
您好、先生、
[引用 userid="525198" URL"~/support/microcontrollers/arm-based-microcontrollers-group/arm-based-microcontrollers/f/arm-based-microcontrollers-forum/1191124/am2434-boot-setup-for-am2434/4493640 #4493640"]请使用什么目标配置?其 AM243x ALV
--
谢谢、此致、
Divyesh Patel
您好、Ming、
感谢您的消息。
[引用 userid="15702" URL"~/support/microcontrollers/arm-based-microcontrollers-group/arm-based-microcontrollers/f/arm-based-microcontrollers-forum/1191124/am2434-boot-setup-for-am2434/4494258 #4494258"]解决方法是在电路板上电后,您可能需要拔下并插入 JTAG。我也尝试过这种方法、但仍然遇到相同的问题
我是否犯了任何错误?
请指导我。
--
谢谢、此致、
Divyesh Patel
您好、Ming、
[引用 userid="15702" URL"~/support/microcontrollers/arm-based-microcontrollers-group/arm-based-microcontrollers/f/arm-based-microcontrollers-forum/1191124/am2434-boot-setup-for-am2434/4495177 #4495177)]您是否使用了"不启动"模式? [/报价]是的、我使用相同的配置。
--
谢谢、此致、
Divyesh Patel