工具与软件：
你好
我想、我已经在文件 SPNU563A–2018年3月、 RCLKSRC VCLKASRC 寄存器中的 RTI1SRC 字段、寄存器中的 VCLKA2S 和 VCLKA1S 字段以及 GHVSRC 寄存器中的 GHVWAKE、HVLPM 和 GHVSRC 字段中发现了差异和潜在遗漏。 这些字段参考时钟源、但缺少关于有效值的明确信息、特别是关于表2-29：时钟源表中详述的未实现的时钟源。
差异详细信息 ：
RCLKSRC 寄存器- RTI1SRC 字段：
3-0 RTI1SRC RTI clock1 source.
0 Clock source0 is the source for RTICLK1.
1h Clock source1 is the source for RTICLK1.
2h Clock source2 is the source for RTICLK1.
3h Clock source3 is the source for RTICLK1.
4h Clock source4 is the source for RTICLK1.
5h Clock source5 is the source for RTICLK1.
6h Clock source6 is the source for RTICLK1.
7h Clock source7 is the source for RTICLK1.
8h-Fh VCLK is the source for RTICLK1.
VCLKASRC 寄存器- VCLKA2S 和 VCLKA1S 字段：
11-8 VCLKA2S Peripheral asynchronous clock2 source.
0 Clock source0 is the source for peripheral asynchronous clock2.
1h Clock source1 is the source for peripheral asynchronous clock2.
2h Clock source2 is the source for peripheral asynchronous clock2.
3h Clock source3 is the source for peripheral asynchronous clock2.
4h Clock source4 is the source for peripheral asynchronous clock2.
5h Clock source5 is the source for peripheral asynchronous clock2.
6h Clock source6 is the source for peripheral asynchronous clock2.
7h Clock source7 is the source for peripheral asynchronous clock2.
8h-Fh VCLK is the source for peripheral asynchronous clock2.
GHVSRC 寄存器- GHVWAKE、HVLPM 和 GHVSRC 字段：
27-24 GHVWAKE GCLK1, HCLK, VCLK source on wakeup.
0 Clock source0 is the source for GCLK1, HCLK, VCLK on wakeup.
1h Clock source1 is the source for GCLK1, HCLK, VCLK on wakeup.
2h Clock source2 is the source for GCLK1, HCLK, VCLK on wakeup.
3h Clock source3 is the source for GCLK1, HCLK, VCLK on wakeup.
4h Clock source4 is the source for GCLK1, HCLK, VCLK on wakeup.
5h Clock source5 is the source for GCLK1, HCLK, VCLK on wakeup.
6h Clock source6 is the source for GCLK1, HCLK, VCLK on wakeup.
7h Clock source7 is the source for GCLK1, HCLK, VCLK on wakeup.
8h-Fh Reserved
19-16 HVLPM HCLK, VCLK, VCLK2 source on wakeup when GCLK1 is turned off.
0 Clock source0 is the source for HCLK, VCLK, VCLK2 on wakeup.
1h Clock source1 is the source for HCLK, VCLK, VCLK2 on wakeup.
2h Clock source2 is the source for HCLK, VCLK, VCLK2 on wakeup.
3h Clock source3 is the source for HCLK, VCLK, VCLK2 on wakeup.
4h Clock source4 is the source for HCLK, VCLK, VCLK2 on wakeup.
5h Clock source5 is the source for HCLK, VCLK, VCLK2 on wakeup.
6h Clock source6 is the source for HCLK, VCLK, VCLK2 on wakeup.
7h Clock source7 is the source for HCLK, VCLK, VCLK2 on wakeup.
8h-Fh Reserved
3-0 GHVSRC GCLK1, HCLK, VCLK, VCLK2 current source.
0 Clock source0 is the source for GCLK1, HCLK, VCLK, VCLK2.
1h Clock source1 is the source for GCLK1, HCLK, VCLK, VCLK2.
2h Clock source2 is the source for GCLK1, HCLK, VCLK, VCLK2.
3h Clock source3 is the source for GCLK1, HCLK, VCLK, VCLK2.
4h Clock source4 is the source for GCLK1, HCLK, VCLK, VCLK2.
5h Clock source5 is the source for GCLK1, HCLK, VCLK, VCLK2.
6h Clock source6 is the source for GCLK1, HCLK, VCLK, VCLK2.
7h Clock source7 is the source for GCLK1, HCLK, VCLK, VCLK2.
8h-Fh Reserved
更正建议 ：
2h Reserved (Not Implemented)
尊敬的 MC b：
[quote userid="606657" url="~/support/microcontrollers/arm-based-microcontrollers-group/arm-based-microcontrollers/f/arm-based-microcontrollers-forum/1448509/tms570lc4357-discrepancy-and-missing-descriptions-for-clock-source-fields-in-rclksrc-vclkasrc-and-ghvsrc-registers 差异：表2-29中的时钟源2列为"未实施"、但在字段说明中显示为有效源。
我觉得这里还可以、因为这里没有提到时钟源的类型、我是说这里提到的是时钟源0、 时钟源1等等
在这里、我没有看到任何问题。 我的意思是、在验证该位之后、客户一定要使用下表验证相应的来源是什么：
参考此表后、他们可以了解此器件未实现时钟源2。
——
谢谢、此致、
Jagadish。
尊敬的 MC b：
使用 HALCoGen、不能对 RTICLK1设置未实现的时钟：
您可以看到这里只有7个时钟源、这意味着我们无法使用 HALCoGen 设置未实现的时钟。
但是、如果直接使用寄存器强制设置此未实现的时钟、则此功能将不起作用。 例如、如果是针对 RTI、则 RTI 功能不起作用。我的意思是我们根本不会获得任何计时器中断。
——
谢谢、此致、
Jagadish。
