[参考译文] CC2340R5：是否支持 J-Link Ultra+？

感谢您发送编修。  
我成功连接了几次,但它总是无法做更多的事情,下面的日志:  

Application log started
- J-Flash V7.88d (J-Flash compiled May 24 2023 15:24:22)
- JLinkARM.dll V7.88d (DLL compiled May 24 2023 15:23:44)
Reading flash device list [C:\Program Files\SEGGER\JLink\ETC/JFlash/Flash.csv] ...
- List of flash devices read successfully (451 Devices)
Reading MCU device list ...
- List of MCU devices read successfully (10362 Devices)
Creating new project ...
- New project created successfully
Connecting ...
- Connecting via USB to probe/ programmer device 0
- Probe/ Programmer firmware: J-Link Ultra V5-1 compiled May 23 2023 14:45:15
- Probe/ Programmer S/N: #########
- Device "CC2340R5" selected.
- Target interface speed: 100 kHz (Fixed)
- VTarget = 3.288V
- ConfigTargetSettings() start
- Flash breakpoints are disabled.
- ConfigTargetSettings() end - Took 13us
- InitTarget() start
- CFG-AP DEVICEID: 0x1BB8402F
- PG2.0 device detected
- CFG-AP DEVICESTATUS: 0x030DBA05
- Checking if AHB-AP is enabled...
- AHB-AP enabled --> Attaching to the target...
- InitTarget() end - Took 15.6ms
- Found SW-DP with ID 0x6BA02477
- DPIDR: 0x6BA02477
- CoreSight SoC-400 or earlier
- AP map detection skipped. Manually configured AP map found.
- AP[0]: AHB-AP (IDR: Not set)
- AP[0]: Core found
- AP[0]: AHB-AP ROM base: 0xE00FF000
- CPUID register: 0x410CC601. Implementer code: 0x41 (ARM)
- Found Cortex-M0 r0p1, Little endian.
- FPUnit: 4 code (BP) slots and 0 literal slots
- CoreSight components:
- ROMTbl[0] @ E00FF000
- [0][0]: E000E000 CID B105E00D PID 000BB008 SCS
- [0][2]: E0002000 CID B105E00D PID 000BB00B FPB
- Executing init sequence ...
- Executing Reset (0, 0 ms)
- ResetTarget() start
- Executing reset via SEC-AP in order to enter SACI mode...
- O.K.
- Executing exit SACI mode sequence...
- O.K.
- Checking if AHB-AP is enabled...
- O.K.
- Checking if debug probe loop entered...
- O.K.
- Invalid application entry addr detected: 0xFFFFFFFF
- ResetTarget() end - Took 195ms
- Initialized successfully
- Target interface speed: 100 kHz (Fixed)
- Found 1 JTAG device. Core ID: 0x6BA02477 (None)
- Connected successfully
Reading entire flash chip ...
- 257 sectors, 2 ranges, 0x0 - 0x7FFFF, 0x4E020000 - 0x4E0207FF
- Start of preparing flash programming
- End of preparing flash programming
- WARNING: Blank check not supported for this flash bank, skipped
- ERROR: Failed to read memory (0x20000 bytes @ address 0x00000000)
- Start of restoring
- End of restoring
- ERROR: Failed to read back target memory
Disconnecting ...
- Disconnected
Connecting ...
- Connecting via USB to probe/ programmer device 0
- Probe/ Programmer firmware: J-Link Ultra V5-1 compiled May 23 2023 14:45:15
- Probe/ Programmer S/N: #########
- Device "CC2340R5" selected.
- Target interface speed: 100 kHz (Fixed)
- VTarget = 3.290V
- ConfigTargetSettings() start
- Flash breakpoints are disabled.
- ConfigTargetSettings() end - Took 9us
- InitTarget() start
- No CFG-AP detected.
- No SEC-AP detected.
- Checking if AHB-AP is enabled...
- AHB-AP enabled --> Attaching to the target...
- InitTarget() end - Took 190ms
- ConfigTargetSettings() start
- Flash breakpoints are disabled.
- ConfigTargetSettings() end - Took 9us
- InitTarget() start
- No CFG-AP detected.
- No SEC-AP detected.
- Checking if AHB-AP is enabled...
- AHB-AP enabled --> Attaching to the target...
- InitTarget() end - Took 190ms
- ERROR: Failed to connect.
Could not establish a connection to target.

为了说明这一点、我们使用定制电路板、我们不确定晶体振荡器是否工作 正常。
这会影响编程和调试吗？