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[参考译文] LAUNCHXL-F28379D:GPIO122 处的外部中断以及 ePWM1、2、3 和 ADC ISR

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请注意,本文内容源自机器翻译,可能存在语法或其它翻译错误,仅供参考。如需获取准确内容,请参阅链接中的英语原文或自行翻译。

https://e2e.ti.com/support/microcontrollers/c2000-microcontrollers-group/c2000/f/c2000-microcontrollers-forum/1531782/launchxl-f28379d-external-interrupt-at-gpio122-along-with-epwm1-2-3-and-adc-isrs

器件型号:LAUNCHXL-F28379D

工具/软件:

您好、您能帮助查找此设置的问题吗? 我已经用一根导线将 GPIO122 引脚接地、然后代码继续进入 ISR XINT1_ISR。  

#include "F28x_Project.h"               // Device Headerfile and Examples Include File
#include "easy2837xD_CPU1_sci_v8.5.h"

interrupt void xint1_isr(void);
void Xint1Setup(void);
void GpioIntSelect(void);

int main(void) {

    DINT;
    InitSysCtrl();
    InitGpio(); 
    GpioCtrlRegs.GPAPUD.bit.GPIO25 = 0; // Would enable the pullup.

    // Configure GPIO as Input for Interrupt
    EALLOW;
    GpioCtrlRegs.GPDMUX2.bit.GPIO122 = 0;      // GPIO0 as GPIO
    GpioCtrlRegs.GPDPUD.bit.GPIO122 = 1;  // 1 = Disable pull-up on GPIO
    GpioCtrlRegs.GPDDIR.bit.GPIO122 = 0;       // Set as input
    GpioCtrlRegs.GPDQSEL2.bit.GPIO122 = 0;     // sync sampling
    GpioCtrlRegs.GPDCTRL.bit.QUALPRD3 = 5; // require 5 SYSCLK samples high
    InputXbarRegs.INPUT1SELECT = 0x122; // Route GPIO122 XINT1 via Input XBAR
    EDIS;

    InitPieCtrl();

    IER = 0x0000;
    IFR = 0x0000;

    InitPieVectTable();

    // Map external ISR
    EALLOW;
    PieVectTable.XINT1_INT = &xint1_isr;
    EDIS;
    PieCtrlRegs.PIEIER1.bit.INTx4   = 1; // XINT1 interrupt (PIE-1.4)

    EALLOW;
    XintRegs.XINT1CR.bit.ENABLE   = 0;  // ensure it’s off
    XintRegs.XINT1CR.bit.POLARITY = 1; // Rising edge
    XintRegs.XINT1CR.bit.ENABLE = 1;   // Enable XINT1
    EDIS;


    IER |= M_INT1;    // allow PIE Group 1 into the CPU
    // Enable PIE interrupts
    PieCtrlRegs.PIECTRL.bit.ENPIE   = 1;

    ledInitGpio();
    pwmInit();
    adcInit();

    EINT;  // Enable Global interrupt INTM
    ERTM;  // Enable Global realtime interrupt DBGM


    EALLOW;
    GpioCtrlRegs.GPADIR.bit.GPIO6 = 1;     // Set GPIO0 as output
    GpioCtrlRegs.GPAMUX1.bit.GPIO6 = 0;    // Set as GPIO
    GpioCtrlRegs.GPAPUD.bit.GPIO6 = 1;     // Disable pull-up
    EDIS;


    // Step 6. IDLE loop. Just sit and loop forever (optional):
    while(1)
    {
        backgroundWork();
    }
}

//------------------------------------------------------------------
float TestVal = 0;
interrupt void xint1_isr(void)
{
    // Clear interrupt flag
    PieCtrlRegs.PIEACK.all = PIEACK_GROUP1;
    TestVal = 1;
    // Re-enable XINT1 so it can fire again
    // (this also clears its internal pending flag)
    XintRegs.XINT1CR.bit.ENABLE = 0;
    XintRegs.XINT1CR.bit.ENABLE = 1;
}

PWM 配置的代码如下:  

    DINT;
    EALLOW;
    CpuSysRegs.PCLKCR0.bit.TBCLKSYNC = 0;      // Stop all the TB clocks
    EDIS;

    EALLOW;  // This is needed to write to EALLOW protected register
    PieVectTable.EPWM1_INT = &epwm1_isr;
    EDIS;    // This is needed to disable write to EALLOW protected registers

    EPwm1Regs.ETSEL.bit.INTSELCMP = 1;              // Use ePWM1 Compare C for triggering event
    EPwm1Regs.CMPC              = 0;
    EPwm1Regs.CMPD              = 0;

    EPwm1Regs.ETSEL.bit.INTSEL = 1;                 // select when interrupt start
    EPwm1Regs.ETSEL.bit.INTEN = 1;                  // Enable INT
    EPwm1Regs.ETPS.bit.INTPRD = ET_1ST;             // Generate INT on 1st event

    EALLOW;
    CpuSysRegs.PCLKCR0.bit.TBCLKSYNC = 1;         // Start all the timers synced
    EDIS;

    IER |= M_INT3;
    EPwm1Regs.ETCLR.bit.INT = 1;
    PieCtrlRegs.PIEIER3.bit.INTx1 = 1;

ADC 配置的代码如下:  

//Map ISR functions
	EALLOW;
	PieVectTable.ADCA1_INT = &adca1_isr; //function for ADCA interrupt 1
	EDIS;

//Configure the ADC and power it up
//	ConfigureADC();
	EALLOW;

	//write configurations
	// max ADC clock freq is 50MHz
	AdcaRegs.ADCCTL2.bit.PRESCALE = 6; //set ADCCLK divider to /4
	AdcbRegs.ADCCTL2.bit.PRESCALE = 6; //set ADCCLK divider to /4

    AdcSetMode(ADC_ADCA, ADC_RESOLUTION_16BIT, ADC_SIGNALMODE_DIFFERENTIAL);
    AdcSetMode(ADC_ADCB, ADC_RESOLUTION_12BIT, ADC_SIGNALMODE_SINGLE);

    // start the interrupt at the end of SOC (late interrput mode)
    AdcaRegs.ADCCTL1.bit.INTPULSEPOS = 1;
    AdcbRegs.ADCCTL1.bit.INTPULSEPOS = 1;

	//power up the ADC
	AdcaRegs.ADCCTL1.bit.ADCPWDNZ = 1;
	AdcbRegs.ADCCTL1.bit.ADCPWDNZ = 1;

	//delay for 1ms to allow ADC time to power up
	DELAY_US(1000);
	EDIS;


	EALLOW;
	// Assumes ePWM clock is already enabled
    EPwm1Regs.ETSEL.bit.SOCAEN = 1;  			//enable SOCA
    EPwm1Regs.ETSEL.bit.SOCASELCMP = 1;			// compare on C or D
	EPwm1Regs.ETSEL.bit.SOCASEL	= 4;	        // 4 = COMPC incrementing
	EPwm1Regs.ETPS.bit.SOCAPRD = 1;		        // Generate pulse on 1st event
	EDIS;

	Uint16 acqps;
	acqps = 63; //320ns

	//Select the channels to convert and end of conversion flag
	EALLOW;
	AdcaRegs.ADCSOC0CTL.bit.CHSEL = 0;			//SOC0 //iU
	AdcaRegs.ADCSOC0CTL.bit.ACQPS = acqps;		//sample window is 100 SYSCLK cycles
	AdcaRegs.ADCSOC0CTL.bit.TRIGSEL = 5;		//trigger on ePWM1 SOCA/C
	AdcaRegs.ADCSOCPRICTL.bit.SOCPRIORITY = 1;	// SOC0 is high priority

	AdcaRegs.ADCSOC1CTL.bit.CHSEL = 2;			//SOC1 will convert pin 2 //iV
	AdcaRegs.ADCSOC1CTL.bit.ACQPS = acqps;
	AdcaRegs.ADCSOC1CTL.bit.TRIGSEL = 5;

	AdcaRegs.ADCSOC2CTL.bit.CHSEL = 4;          //iW
	AdcaRegs.ADCSOC2CTL.bit.ACQPS = acqps;
	AdcaRegs.ADCSOC2CTL.bit.TRIGSEL = 5;

	AdcaRegs.ADCINTSEL1N2.bit.INT1E = 1;		//enable INT1 flag
	AdcaRegs.ADCINTFLGCLR.bit.ADCINT1 = 1;		//make sure INT1 flag is cleared

	EDIS;


	acqps = 14; //75ns

	EALLOW;
    AdcbRegs.ADCSOC0CTL.bit.CHSEL = 4;  // Vab
    AdcbRegs.ADCSOC0CTL.bit.ACQPS = acqps; //sample window is 100 SYSCLK cycles
    AdcbRegs.ADCSOC0CTL.bit.TRIGSEL = 5; //trigger on ePWM1 SOCA/C

    AdcbRegs.ADCSOC1CTL.bit.CHSEL = 5;  //Vbc
    AdcbRegs.ADCSOC1CTL.bit.ACQPS = acqps; //sample window is 100 SYSCLK cycles
    AdcbRegs.ADCSOC1CTL.bit.TRIGSEL = 5; //trigger on ePWM1 SOCA/C

    AdcbRegs.ADCSOC2CTL.bit.CHSEL = 3;  //Vdc
    AdcbRegs.ADCSOC2CTL.bit.ACQPS = acqps; //sample window is 100 SYSCLK cycles
    AdcbRegs.ADCSOC2CTL.bit.TRIGSEL = 5; //trigger on ePWM1 SOCA/C

    AdcbRegs.ADCSOC3CTL.bit.CHSEL = 2;  //Idc
    AdcbRegs.ADCSOC3CTL.bit.ACQPS = acqps; //sample window is 100 SYSCLK cycles
    AdcbRegs.ADCSOC3CTL.bit.TRIGSEL = 5; //trigger on ePWM1 SOCA/C

	EDIS;


//Enable global Interrupts and higher priority real-time debug events:
	IER |= M_INT1; //Enable group 1 interrupts


//enable PIE interrupt
	PieCtrlRegs.PIEIER1.bit.INTx1 = 1;

//sync ePWM
	EALLOW;
	CpuSysRegs.PCLKCR0.bit.TBCLKSYNC = 1;
	EDIS;


  • 请注意,本文内容源自机器翻译,可能存在语法或其它翻译错误,仅供参考。如需获取准确内容,请参阅链接中的英语原文或自行翻译。

    您好、

    GPIO122 用于 XINT1? 什么是极性配置?

    我已通过导线将 GPIO122 引脚接地、甚至随后代码继续进入 ISR XINT1_ISR。

    这些 ISR 是否有中断嵌套? 您是否可以尝试禁用嵌套或甚至其他 ISR 并查看是否触发了 XINT ISR?

    谢谢。

  • 请注意,本文内容源自机器翻译,可能存在语法或其它翻译错误,仅供参考。如需获取准确内容,请参阅链接中的英语原文或自行翻译。

    GPIO 引脚通过电线连接到接地引脚、甚至随后我进入 ISR。 因此、代码继续进入 XINT ISR、尽管我希望它仅在更改 GPIO 引脚的状态时进入

  • 请注意,本文内容源自机器翻译,可能存在语法或其它翻译错误,仅供参考。如需获取准确内容,请参阅链接中的英语原文或自行翻译。

    您好、是否有某种噪声耦合到了引脚? 您是独立运行 MCU 还是在连接了系统的情况下运行? 您能否尝试在一些周期内进行引脚鉴定、以避免与引脚耦合的噪声可能性。

    这些 ISR 是否有中断嵌套? 您是否可以尝试禁用嵌套或甚至其他 ISR 并查看是否触发了 XINT ISR?

    您是否尝试过上述操作?

    谢谢

  • 请注意,本文内容源自机器翻译,可能存在语法或其它翻译错误,仅供参考。如需获取准确内容,请参阅链接中的英语原文或自行翻译。

    根据您有关引脚鉴定、极性等的问题、这些问题已在上面共享的代码中配置。 是、电路板独立运行。 如果您有电路板、是否可以检查 ISR 是否针对 GPIO 122 顺利运行? 非常感谢

  • 请注意,本文内容源自机器翻译,可能存在语法或其它翻译错误,仅供参考。如需获取准确内容,请参阅链接中的英语原文或自行翻译。

    你能和我分享这个项目吗?

    谢谢

  • 请注意,本文内容源自机器翻译,可能存在语法或其它翻译错误,仅供参考。如需获取准确内容,请参阅链接中的英语原文或自行翻译。

    您好 Prarthan、很抱歉、我无法共享整个项目? 我已经分享了用于设置 PWM 和 ADC 的代码片段的 main.c 和代码片段。  

  • 请注意,本文内容源自机器翻译,可能存在语法或其它翻译错误,仅供参考。如需获取准确内容,请参阅链接中的英语原文或自行翻译。

    您能否向我发送该项目的削减版本、以便我重现该问题?

    我不需要其他代码、只需要极少的代码即可重现此问题

    谢谢