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器件型号： TMS320F28377D
尊敬的专家：
我对 ADC ex6 soc 连续 DMA 示例有一些限制。
首先介绍 ADCA 触发。
SCO0 似乎由 PWM 触发、SOC 的其余部分由软件触发。
//
// Configure SOCs channel no. & acquisition window.
// Trigger SCO0 from EPWM2SOCA.
// Trigger all other SOCs from INT1 (EOC on SOC0).
//
ADC_setupSOC(adcBase, ADC_SOC_NUMBER0, ADC_TRIGGER_EPWM2_SOCA,
(ADC_Channel)channel, acqps);
ADC_setupSOC(adcBase, ADC_SOC_NUMBER1, ADC_TRIGGER_SW_ONLY,
(ADC_Channel)channel, acqps);
ADC_setupSOC(adcBase, ADC_SOC_NUMBER2, ADC_TRIGGER_SW_ONLY,
(ADC_Channel)channel, acqps);
ADC_setupSOC(adcBase, ADC_SOC_NUMBER3, ADC_TRIGGER_SW_ONLY,
(ADC_Channel)channel, acqps);
ADC_setupSOC(adcBase, ADC_SOC_NUMBER4, ADC_TRIGGER_SW_ONLY,
(ADC_Channel)channel, acqps);
ADC_setupSOC(adcBase, ADC_SOC_NUMBER5, ADC_TRIGGER_SW_ONLY,
(ADC_Channel)channel, acqps);
ADC_setupSOC(adcBase, ADC_SOC_NUMBER6, ADC_TRIGGER_SW_ONLY,
(ADC_Channel)channel, acqps);
ADC_setupSOC(adcBase, ADC_SOC_NUMBER7, ADC_TRIGGER_SW_ONLY,
(ADC_Channel)channel, acqps);
ADC_setupSOC(adcBase, ADC_SOC_NUMBER8, ADC_TRIGGER_SW_ONLY,
(ADC_Channel)channel, acqps);
ADC_setupSOC(adcBase, ADC_SOC_NUMBER9, ADC_TRIGGER_SW_ONLY,
(ADC_Channel)channel, acqps);
ADC_setupSOC(adcBase, ADC_SOC_NUMBER10, ADC_TRIGGER_SW_ONLY,
(ADC_Channel)channel, acqps);
ADC_setupSOC(adcBase, ADC_SOC_NUMBER11, ADC_TRIGGER_SW_ONLY,
(ADC_Channel)channel, acqps);
ADC_setupSOC(adcBase, ADC_SOC_NUMBER12, ADC_TRIGGER_SW_ONLY,
(ADC_Channel)channel, acqps);
ADC_setupSOC(adcBase, ADC_SOC_NUMBER13, ADC_TRIGGER_SW_ONLY,
(ADC_Channel)channel, acqps);
ADC_setupSOC(adcBase, ADC_SOC_NUMBER14, ADC_TRIGGER_SW_ONLY,
(ADC_Channel)channel, acqps);
ADC_setupSOC(adcBase, ADC_SOC_NUMBER15, ADC_TRIGGER_SW_ONLY,
(ADC_Channel)channel, acqps);
在注释中、我假设这些 SOC 由 ISR 中的 SW 触发、但是我在 ADC ISR 中没有看到 ADC 触发
//
// adcA1ISR - This is called after the very first conversion and will disable
// the ePWM SOC to avoid re-triggering problems.
//
#pragma CODE_SECTION(adcA1ISR, ".TI.ramfunc");
__interrupt void adcA1ISR(void)
{
//
// Remove ePWM trigger
//
EPWM_disableADCTrigger(EPWM2_BASE, EPWM_SOC_A);
//
// Disable this interrupt from happening again
//
Interrupt_disable(INT_ADCA1);
//
// Acknowledge interrupt
//
Interrupt_clearACKGroup(INTERRUPT_ACK_GROUP1);
}那么、SOC1-SOC15 是如何触发的呢？
第二种方法是 DMA。 配置如下所示：
DMA_configAddresses(DMA_CH1_BASE, (uint16_t *)&adcADataBuffer,
(uint16_t *)ADCARESULT_BASE);
//
// Perform enough 16-word bursts to fill the results buffer. Data will be
// transferred 32 bits at a time hence the address steps below.
//
DMA_configBurst(DMA_CH1_BASE, 16, 2, 2);
DMA_configTransfer(DMA_CH1_BASE, (RESULTS_BUFFER_SIZE >> 4), -14, 2);
DMA_configMode(DMA_CH1_BASE, DMA_TRIGGER_ADCA2,
(DMA_CFG_ONESHOT_DISABLE | DMA_CFG_CONTINUOUS_DISABLE |
DMA_CFG_SIZE_32BIT));从 src_addr 和 dest_addr 中、我假设此 DMA 将 ADC 结果寄存器与缓冲区相匹配。 ADC 结果寄存器为 16 位*16 (result0-result15)、但字长设置为 32 位、Brust 大小为 16、在每个 Brust 中、src_addr 将覆盖 32 位*16 的范围、这与 ADC 结果长度不对齐。
传递步骤也会令人困惑。 在每个突发中、src_addr 向前移动 (16-1)*2 = 30、如果我们要在每次突发后将 src_addr 复位为 ADC 结果 t0、则应将 transfer_step 设置为–30、对吧？ 但在示例中设置为–14。 我想不出为什么它设置为–14。
您能帮助澄清上述混淆吗？
此致、
挂起
