This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

[参考译文] TMS320F28379D:在 ram 命令文件中、如何增加数据段大小

Guru**** 2815985 points
请注意,本文内容源自机器翻译,可能存在语法或其它翻译错误,仅供参考。如需获取准确内容,请参阅链接中的英语原文或自行翻译。

https://e2e.ti.com/support/microcontrollers/c2000-microcontrollers-group/c2000/f/c2000-microcontrollers-forum/1602353/tms320f28379d-in-ram-command-file-how-to-increase-data-section-size

部件号: TMS320F28379D

尊敬的先生:

如何增加数据段大小。 在构建程序时、我收到以下错误消息、

[110]<Linking>
[111]../2837xD_RAM_lnk_cpu1.cmd“、第 91 行:错误#10099-D:程序将无法放入可用存储器中、或者该部分包含一个需要无法为该部分生成蹦床函数的调用站点。 对于“.data"大小“大小 0xa0 第 1 页、带对齐/分块的运行放置失败。  可用存储器范围:
[112] RAMLS5   大小    :0x800 未使用:0xa6     最大孔:0xa6
[113]错误#10010:链接过程中遇到错误;未构建“integrated_code__pll_verified.out"</s>“

谢谢。此致、

Prashant Gugle

  • 请注意,本文内容源自机器翻译,可能存在语法或其它翻译错误,仅供参考。如需获取准确内容,请参阅链接中的英语原文或自行翻译。

    您好、Prashant、

    您是否可以共享链接器 cmd 文件以供进一步分析?

    分配给.data 段的存储器不足以容纳整个数据、因此我们需要添加额外的存储器段来填充数据。

    请将 GS0 RAM 用于数据部分、并检查它是否能解决您的问题。

    .data       :> RAMGS0、  PAGE = 1

    谢谢

    Aswin

  • 请注意,本文内容源自机器翻译,可能存在语法或其它翻译错误,仅供参考。如需获取准确内容,请参阅链接中的英语原文或自行翻译。

    尊敬的 Aswin:

    请查找随附的链接器命令文件以进行分析。

    MEMORY
    {
    PAGE 0 :
       /* BEGIN is used for the "boot to SARAM" bootloader mode   */
    
       BEGIN            : origin = 0x000000, length = 0x000002
       RAMM0            : origin = 0x000123, length = 0x0002DD
       RAMD0            : origin = 0x00B000, length = 0x000800
       RAMLS0           : origin = 0x008000, length = 0x000800
       RAMLS1           : origin = 0x008800, length = 0x000800
       RAMLS2           : origin = 0x009000, length = 0x000800
       RAMLS3           : origin = 0x009800, length = 0x000800
       RAMLS4           : origin = 0x00A000, length = 0x000800
       RESET            : origin = 0x3FFFC0, length = 0x000002
    
      /* Flash sectors */
       FLASHA           : origin = 0x080002, length = 0x001FFE	/* on-chip Flash */
       FLASHB           : origin = 0x082000, length = 0x002000	/* on-chip Flash */
       FLASHC           : origin = 0x084000, length = 0x002000	/* on-chip Flash */
       FLASHD           : origin = 0x086000, length = 0x002000	/* on-chip Flash */
       FLASHE           : origin = 0x088000, length = 0x008000	/* on-chip Flash */
       FLASHF           : origin = 0x090000, length = 0x008000	/* on-chip Flash */
       FLASHG           : origin = 0x098000, length = 0x008000	/* on-chip Flash */
       FLASHH           : origin = 0x0A0000, length = 0x008000	/* on-chip Flash */
       FLASHI           : origin = 0x0A8000, length = 0x008000	/* on-chip Flash */
       FLASHJ           : origin = 0x0B0000, length = 0x008000	/* on-chip Flash */
       FLASHK           : origin = 0x0B8000, length = 0x002000	/* on-chip Flash */
       FLASHL           : origin = 0x0BA000, length = 0x002000	/* on-chip Flash */
       FLASHM           : origin = 0x0BC000, length = 0x002000	/* on-chip Flash */
       FLASHN           : origin = 0x0BE000, length = 0x001FF0	/* on-chip Flash */
    
    //   FLASHN_RSVD     : origin = 0x0BFFF0, length = 0x000010    /* Reserve and do not use for code as per the errata advisory "Memory: Prefetching Beyond Valid Memory" */
    
    PAGE 1 :
    
       BOOT_RSVD       : origin = 0x000002, length = 0x000121     /* Part of M0, BOOT rom will use this for stack */
       RAMM1           : origin = 0x000400, length = 0x0003F8     /* on-chip RAM block M1 */
    //   RAMM1_RSVD      : origin = 0x0007F8, length = 0x000008     /* Reserve and do not use for code as per the errata advisory "Memory: Prefetching Beyond Valid Memory" */
       RAMD1           : origin = 0x00B800, length = 0x000800
    
       RAMLS5      : origin = 0x00A800, length = 0x000800
    
       RAMGS0      : origin = 0x00C000, length = 0x001000
       RAMGS1      : origin = 0x00D000, length = 0x001000
       RAMGS2      : origin = 0x00E000, length = 0x001000
       RAMGS3      : origin = 0x00F000, length = 0x001000
       RAMGS4      : origin = 0x010000, length = 0x001000
       RAMGS5      : origin = 0x011000, length = 0x001000
       RAMGS6      : origin = 0x012000, length = 0x001000
       RAMGS7      : origin = 0x013000, length = 0x001000
       RAMGS8      : origin = 0x014000, length = 0x001000
       RAMGS9      : origin = 0x015000, length = 0x001000
       RAMGS10     : origin = 0x016000, length = 0x001000
    
    //   RAMGS11     : origin = 0x017000, length = 0x000FF8   /* Uncomment for F28374D, F28376D devices */
    
    //   RAMGS11_RSVD : origin = 0x017FF8, length = 0x000008    /* Reserve and do not use for code as per the errata advisory "Memory: Prefetching Beyond Valid Memory" */
    
       RAMGS11     : origin = 0x017000, length = 0x001000     /* Only Available on F28379D, F28377D, F28375D devices. Remove line on other devices. */
       RAMGS12     : origin = 0x018000, length = 0x001000     /* Only Available on F28379D, F28377D, F28375D devices. Remove line on other devices. */
       RAMGS13     : origin = 0x019000, length = 0x001000     /* Only Available on F28379D, F28377D, F28375D devices. Remove line on other devices. */
       RAMGS14     : origin = 0x01A000, length = 0x001000     /* Only Available on F28379D, F28377D, F28375D devices. Remove line on other devices. */
       RAMGS15     : origin = 0x01B000, length = 0x000FF8     /* Only Available on F28379D, F28377D, F28375D devices. Remove line on other devices. */
       
    //   RAMGS15_RSVD : origin = 0x01BFF8, length = 0x000008    /* Reserve and do not use for code as per the errata advisory "Memory: Prefetching Beyond Valid Memory" */
                                                                /* Only on F28379D, F28377D, F28375D devices. Remove line on other devices. */
    
       CPU2TOCPU1RAM   : origin = 0x03F800, length = 0x000400
       CPU1TOCPU2RAM   : origin = 0x03FC00, length = 0x000400
    
       CANA_MSG_RAM     : origin = 0x049000, length = 0x000800
       CANB_MSG_RAM     : origin = 0x04B000, length = 0x000800
    }
    
    
    SECTIONS
    {
       codestart        : > BEGIN,     PAGE = 0
       .text            : >> RAMGS0 | RAMGS1 | RAMGS2 | RAMGS3, PAGE = 1
       .cinit           : > RAMM0,     PAGE = 0
       .switch          : > RAMM0,     PAGE = 0
       .reset           : > RESET,     PAGE = 0, TYPE = DSECT /* not used, */
       .stack           : > RAMM1,     PAGE = 1
    
    #if defined(__TI_EABI__)
       .bss             : > RAMLS5,    PAGE = 1
       .bss:output      : > RAMLS3,    PAGE = 0
       .init_array      : > RAMM0,     PAGE = 0
       .const           : > RAMLS5,    PAGE = 1
       .data            : > RAMLS5,    PAGE = 1     
       .sysmem          : > RAMLS5,    PAGE = 1
    #else
       .pinit           : > RAMM0,     PAGE = 0
       .ebss            : > RAMLS5,    PAGE = 1
       .econst          : > RAMLS5,    PAGE = 1
       .esysmem         : > RAMLS5,    PAGE = 1
    #endif
    	/* Digital Controller Library functions */
    	dclfuncs		     : > RAMLS4,		PAGE = 0
    	dcl32funcs		  : > RAMLS4,		PAGE = 0
    
       Filter_RegsFile  : > RAMGS0,    PAGE = 1
    
    
       ramgs0           : > RAMGS0,    PAGE = 1
       ramgs1           : > RAMGS1,    PAGE = 1
    
    #ifdef __TI_COMPILER_VERSION__
       #if __TI_COMPILER_VERSION__ >= 15009000
        .TI.ramfunc : {} > RAMM0,      PAGE = 0
       #else
        ramfuncs    : > RAMM0      PAGE = 0   
       #endif
    #endif
    
       /* The following section definitions are required when using the IPC API Drivers */
        GROUP : > CPU1TOCPU2RAM, PAGE = 1
        {
            PUTBUFFER
            PUTWRITEIDX
            GETREADIDX
        }
    
        GROUP : > CPU2TOCPU1RAM, PAGE = 1
        {
            GETBUFFER :    TYPE = DSECT
            GETWRITEIDX :  TYPE = DSECT
            PUTREADIDX :   TYPE = DSECT
        }
    
        /* The following section definition are for SDFM examples */
       Filter1_RegsFile : > RAMGS1, PAGE = 1, fill=0x1111
       Filter2_RegsFile : > RAMGS2, PAGE = 1, fill=0x2222
       Filter3_RegsFile : > RAMGS3, PAGE = 1, fill=0x3333
       Filter4_RegsFile : > RAMGS4, PAGE = 1, fill=0x4444
       Difference_RegsFile : >RAMGS5,   PAGE = 1, fill=0x3333
    }
    
    /*
    //===========================================================================
    // End of file.
    //===========================================================================
    */
    

  • 请注意,本文内容源自机器翻译,可能存在语法或其它翻译错误,仅供参考。如需获取准确内容,请参阅链接中的英语原文或自行翻译。

    您好、Prashant、

    请将 GS0 RAM 用于数据部分、并检查它是否能解决您的问题。

    .data       :> RAMGS0、  PAGE = 1

    谢谢

    Aswin

  • 请注意,本文内容源自机器翻译,可能存在语法或其它翻译错误,仅供参考。如需获取准确内容,请参阅链接中的英语原文或自行翻译。

    尊敬的 Aswin:

    即使我将 RAMGS0 用于.text 段也是如此  

     .text       :>> RAMGS0 | RAMGS1 | RAMGS2 | RAMGS3、PAGE = 1

    仍然可以用于.data 段?

    实际上、我使用 RAMGS0 作为数据部分、并且构建过程没有错误。

    谢谢。此致、

    Prashant Gugle