[参考译文] TMS320F28069：十六进制实用程序：生成用于未配置内存的十六进制文件

/*
//###########################################################################
//
// FILE:    F28069.cmd
//
// TITLE:   Linker Command File For F28069 Device
//
//###########################################################################
// $TI Release: F2806x C/C++ Header Files and Peripheral Examples V150 $ 
// $Release Date: June 16, 2015 $ 
// $Copyright: Copyright (C) 2011-2015 Texas Instruments Incorporated -
//             http://www.ti.com/ ALL RIGHTS RESERVED $
//###########################################################################
*/

/* ======================================================
// For Code Composer Studio V2.2 and later
// ---------------------------------------
// In addition to this memory linker command file,
// add the header linker command file directly to the project.
// The header linker command file is required to link the
// peripheral structures to the proper locations within
// the memory map.
//
// The header linker files are found in <base>\F2806x_headers\cmd
//
// For BIOS applications add:      F2806x_Headers_BIOS.cmd
// For nonBIOS applications add:   F2806x_Headers_nonBIOS.cmd
========================================================= */

/* ======================================================
// For Code Composer Studio prior to V2.2
// --------------------------------------
// 1) Use one of the following -l statements to include the
// header linker command file in the project. The header linker
// file is required to link the peripheral structures to the proper
// locations within the memory map                                    */

/* Uncomment this line to include file only for non-BIOS applications */
/* -l F2806x_Headers_nonBIOS.cmd */

/* Uncomment this line to include file only for BIOS applications */
/* -l F2806x_Headers_BIOS.cmd */

/* 2) In your project add the path to <base>\F2806x_headers\cmd to the
   library search path under project->build options, linker tab,
   library search path (-i).
/*========================================================= */

/* Define the memory block start/length for the F2806x
   PAGE 0 will be used to organize program sections
   PAGE 1 will be used to organize data sections

   Notes:
         Memory blocks on F28069 are uniform (ie same
         physical memory) in both PAGE 0 and PAGE 1.
         That is the same memory region should not be
         defined for both PAGE 0 and PAGE 1.
         Doing so will result in corruption of program
         and/or data.

         Contiguous SARAM memory blocks can be combined
         if required to create a larger memory block.
*/

//Cla1Prog_Start = Cla1funcsRunStart;
-heap 10
-stack 944

// Define a size for the CLA scratchpad area that will be used
// by the CLA compiler for local symbols and temps
// Also force references to the special symbols that mark the
// scratchpad are.
CLA_SCRATCHPAD_SIZE = 0x200;
--undef_sym=__cla_scratchpad_end
--undef_sym=__cla_scratchpad_start

MEMORY
{
PAGE 0 :   /* Program Memory */
           /* Memory (RAM/FLASH/OTP) blocks can be moved to PAGE1 for data allocation */
   OTP         : origin = 0x3D7800, length = 0x0003F6     /* on-chip OTP | keep distance to OTP_KEY and OTP_BMODE */

   RAML3       : origin = 0x009000, length = 0x001000	  /* Cla Programm Ram */
   //RAML5	   : origin = 0x00C000, length = 0x002000	  // ramfuncs TODO move ramfuncs to L7 and place taskdata / heap here
   RAML7       : origin = 0x010000, length = 0x002000     	/* on-chip RAM block L7 */


   FLASHH      : origin = 0x3D8000, length = 0x004000     /* on-chip FLASH*/
   FLASHG      : origin = 0x3DC000, length = 0x004000     /* on-chip FLASH */
   FLASHEF	   : origin = 0x3E0000, length = 0x008000	  /* fusion of flash E and Flash F*/
   FLASHD      : origin = 0x3E8000, length = 0x004000     /* on-chip FLASH */
   FLASHC      : origin = 0x3EC000, length = 0x004000     /* on-chip FLASH */
   FLASHB      : origin = 0x3F0000, length = 0x004000     /* on-chip FLASH */
   FLASHA      : origin = 0x3F4000, length = 0x003F80     /* on-chip FLASH */

   CSM_RSVD    : origin = 0x3F7F80, length = 0x000076     /* Part of FLASHA.  Program with all 0x0000 when CSM is in use. */
   BEGIN       : origin = 0x3F7FF6, length = 0x000002     /* Part of FLASHA.  Used for "boot to Flash" bootloader mode. */
   CSM_PWL_P0  : origin = 0x3F7FF8, length = 0x000008     /* Part of FLASHA.  CSM password locations in FLASHA */

// LUT in Boot Rom
   FPUTABLES   : origin = 0x3FD860, length = 0x0006A0	  /* FPU Tables in Boot ROM */
   IQTABLES    : origin = 0x3FDF00, length = 0x000B50     /* IQ Math Tables in Boot ROM */
   IQTABLES2   : origin = 0x3FEA50, length = 0x00008C     /* IQ Math Tables in Boot ROM */
   IQTABLES3   : origin = 0x3FEADC, length = 0x0000AA	  /* IQ Math Tables in Boot ROM */

   ROM         : origin = 0x3FF3B0, length = 0x000C10     /* Boot ROM */
   RESET       : origin = 0x3FFFC0, length = 0x000002     /* part of boot ROM  */
   VECTORS     : origin = 0x3FFFC2, length = 0x00003E     /* part of boot ROM  */

   EXT_MEM	   : origin = 0x000, length = 0x7530          /* eeprom workaround*/

PAGE 1 :   /* Data Memory */
           /* Memory (RAM/FLASH/OTP) blocks can be moved to PAGE0 for program allocation */
           /* Registers remain on PAGE1                                                  */
   BOOT_RSVD   : origin = 0x000000, length = 0x000050     /* Part of M0, BOOT rom will use this for stack */

   RAMM0       : origin = 0x000050, length = 0x0003B0     // used as stack
   RAMM1       : origin = 0x000400, length = 0x000400     // used as c stack

   RAML0       : origin = 0x008000, length = 0x000800     	// used for rtos task stack
   RAML4       : origin = 0x00A000, length = 0x002000     	// dito and as heap extension
   RAML5	   : origin = 0x00C000, length = 0x002000		// dito
   RAML6       : origin = 0x00E000, length = 0x002000     	// used as heap highest stack pointer range !!!

   //RAML7       : origin = 0x010000, length = 0x002000     	/* on-chip RAM block L7 */
   RAML8       : origin = 0x012000, length = 0x002000     	/* on-chip RAM block L8 */
   USB_RAM     : origin = 0x040000, length = 0x000800     	/* USB RAM		  */

   CLARAM0     : origin = 0x008800, length = 0x000400 		/* Replaces RAML1 */
   CLARAM1     : origin = 0x008C00, length = 0x000400

   CLA1_MSGRAMLOW       : origin = 0x001480, length = 0x000080
   CLA1_MSGRAMHIGH      : origin = 0x001500, length = 0x000080
}

/* Allocate sections to memory blocks.
   Note:
         codestart user defined section in DSP28_CodeStartBranch.asm used to redirect code
                   execution when booting to flash
         ramfuncs  user defined section to store functions that will be copied from Flash into RAM
*/

SECTIONS
{

   /* Allocate program areas: */
   .cinit              : > FLASHEF | FLASHH,  PAGE = 0, crc_table(FlashCrc)
   .text               : >> FLASHA | FLASHB | FLASHC | FLASHD | FLASHG | FLASHEF, PAGE = 0, crc_table(FlashCrc)
   codestart           : > BEGIN,      PAGE = 0

/*
   .TI.ramfunc           : LOAD = FLASHH,
                         RUN = RAML5,
                         LOAD_START(TiRamfuncsLoadStart),
                         LOAD_END(TiRamfuncsLoadEnd),
                         RUN_START(TiRamfuncsRunStart),
						 LOAD_SIZE(TiRamfuncsLoadSize),
                         crc_table(RamfuncsCrc)		// also add to Flash Crc Table
*/

   .TI.ramfunc		   : > RAML7, RUN_START(TiRamfuncsRunStart), RUN_SIZE(TiRamfuncsLoadSize), PAGE = 0, crc_table(RamfuncsCrc)

   csmpasswds          : > CSM_PWL_P0, PAGE = 0
   csm_rsvd            : > CSM_RSVD,   PAGE = 0

   /* Allocate uninitalized data sections: */
   .stack              : > RAMM0,      PAGE = 1				// stack
   .ebss               : > RAML8,      PAGE = 1				// generic ram data
   .bss                : >> RAML8 | USB_RAM,PAGE = 1     	// generic ram data
   .esysmem            : > RAML8,      PAGE = 1				// heap
   .sysmem			   : > RAML8,	   PAGE = 1

   /* Initalized sections to go in Flash */
   /* For SDFlash to program these, they must be allocated to page 0 */
   .const			   : >> FLASHG | FLASHEF | FLASHH, PAGE = 0, crc_table(FlashCrc)
   .init_array		   : > FLASHEF, PAGE = 0, crc_table(FlashCrc)
   .switch             : > FLASHEF, PAGE = 0, crc_table(FlashCrc)

   .data			   : > RAML8, PAGE = 1

   /* Allocate IQ math areas: */
   IQmath              : > FLASHA,     PAGE = 0
   IQmathTables        : > IQTABLES,   PAGE = 0, TYPE = NOLOAD
   
   /* Allocate FPU math areas: */
   FPUmathTables       : > FPUTABLES,  PAGE = 0, TYPE = NOLOAD
   
   DMARAML5	           : > RAML6,      PAGE = 1
   DMARAML6	           : > RAML6,      PAGE = 1
   //DMARAML7	           : > RAML7,      PAGE = 1
   DMARAML8	           : > RAML8,      PAGE = 1

	/* Cla Stuff */
   .scratchpad      : > CLARAM0,   PAGE = 1
   .bss_cla         : > CLARAM0,   PAGE = 1
   .const_cla       : > CLARAM0,   PAGE = 1

   Cla1ToCpuMsgRAM  : > CLA1_MSGRAMLOW,   PAGE = 1
   CpuToCla1MsgRAM  : > CLA1_MSGRAMHIGH,  PAGE = 1
/*
   Cla1Prog         : LOAD = FLASHH, PAGE = 0,
                     RUN = RAML3,
                     LOAD_START(Cla1funcsLoadStart),
                     LOAD_END(Cla1funcsLoadEnd),
                     RUN_START(Cla1funcsRunStart),
                     LOAD_SIZE(Cla1funcsLoadSize),
					 crc_table(ClaCrc)
*/
   Cla1Prog			: > RAML3, PAGE = 0, RUN_START(Cla1ProgRunStart), RUN_SIZE(Cla1ProgRunSize), crc_table(ClaCrc)

   Cla1DataRam0		: > CLARAM0,		  PAGE = 1
   Cla1DataRam1		: > CLARAM1,		  PAGE = 1
/*
   CLA1mathTables	: LOAD = EEPROM, PAGE = 0,
					  RUN = CLARAM1, PAGE = 1,
                      LOAD_START(Cla1mathTablesLoadStart),
                      LOAD_END(Cla1mathTablesLoadEnd),
                      LOAD_SIZE(Cla1mathTablesLoadSize),
                      RUN_START(Cla1mathTablesRunStart),
                      crc_table(ClaCrc)
*/

   CLA1mathTables	: > CLARAM1, PAGE = 1, RUN_START(Cla1mathTablesRunStart), RUN_SIZE(Cla1mathTablesLoadSize), crc_table(ClaCrc)

   CLAscratch       :
                     { *.obj(CLAscratch)
                     . += CLA_SCRATCHPAD_SIZE;
                     *.obj(CLAscratch_end) } > CLARAM0,
					 PAGE = 1

	/* used for rtos heap */
	rtos_heap		: > RAML6		PAGE = 1
	//rtos_heap_ext	: > RAML5		PAGE = 0
	rtos_heap_m1	: > RAMM1		PAGE = 1 (HIGH)
	rtos_heap_l4 	: > RAML4		PAGE = 1

   /* Data Section for Task Stack Memory */
   task_data		: >> RAML0 | RAMM0 | RAML4,		PAGE = 1
   /* Data Section in Flash for Settings etc */
   .cio 			: > RAML8,		PAGE = 1
   .TI.crctab		: > FLASHEF | FLASHH,	PAGE = 0
   .clean 			: > FLASHD,	PAGE = 0

   .c28xabi.extab	: > FLASHEF, PAGE = 0 		// crc tables maybe work in the future until then we have to hope for the best
   .c28xabi.exidx   : > FLASHH, PAGE = 0

   OTP_ROM			: > FLASHEF, PAGE = 0		// someday this is copied into otp, maybe

   /*config and cli elements in external eeprom*/
   .config 			: {*Config*.* (.const)} > FLASHEF, PAGE = 0
   .cli_scmd		: {CliCmdDeflated.obj (.const)} > EXT_MEM, PAGE = 0, RUN_SIZE(CliScmdSize)

/*
   Flash28_API:
   {
       	-l flash_api_f2806x_eabi.lib(.text)
        -l flash_api_f2806x_eabi.lib(.const)
        -l flash_api_f2806x_eabi.lib(.econst)
   }
   	 LOAD = FLASHF,
     RUN = RAML5,
     LOAD_START(Flash28_API_LoadStart),
     LOAD_SIZE(Flash28_API_LoadSize),
     LOAD_END(Flash28_API_LoadEnd),
     RUN_START(Flash28_API_RunStart),
     PAGE = 0,
     crc_table(FlashCrc)
*/

  /* Uncomment the section below if calling the IQNexp() or IQexp()
      functions from the IQMath.lib library in order to utilize the
      relevant IQ Math table in Boot ROM (This saves space and Boot ROM
      is 1 wait-state). If this section is not uncommented, IQmathTables2
      will be loaded into other memory (SARAM, Flash, etc.) and will take
      up space, but 0 wait-state is possible.
   */
   /*
   IQmathTables2    : > IQTABLES2, PAGE = 0, TYPE = NOLOAD
   {

              IQmath.lib<IQNexpTable.obj> (IQmathTablesRam)

   }
   */
    /* Uncomment the section below if calling the IQNasin() or IQasin()
       functions from the IQMath.lib library in order to utilize the
       relevant IQ Math table in Boot ROM (This saves space and Boot ROM
       is 1 wait-state). If this section is not uncommented, IQmathTables2
       will be loaded into other memory (SARAM, Flash, etc.) and will take
       up space, but 0 wait-state is possible.
    */
    /*
    IQmathTables3    : > IQTABLES3, PAGE = 0, TYPE = NOLOAD
    {

               IQmath.lib<IQNasinTable.obj> (IQmathTablesRam)

    }
    */

   /* .reset is a standard section used by the compiler.  It contains the */
   /* the address of the start of _c_int00 for C Code.   /*
   /* When using the boot ROM this section and the CPU vector */
   /* table is not needed.  Thus the default type is set here to  */
   /* DSECT  */
   .reset              : > RESET,      PAGE = 0, TYPE = DSECT
   vectors             : > VECTORS,    PAGE = 0, TYPE = DSECT

}

/*
//===========================================================================
// End of file.
//===========================================================================
*/

目前，.CLI_SCMD 部分很有趣，可以看到，该部分链接到从0开始的外部内存。 通常这不是问题，除非有时空指针仍然有效，但这在这里不是问题

我怀疑.CLI_SCMD 输出部分不能按您的意愿工作。  让我们来看看它是如何被指定的...

   .cli_scmd		: {CliCmdDeflated.obj (.const)} > EXT_MEM, PAGE = 0, RUN_SIZE(CliScmdSize)

这表明要创建名为.CLI_SCMD 的输出部分。  它由一个输入部分组成，即来自 CliCmdDeflated．obj 的.const 部分。  它分配给内存范围 EXT_MEM 中的地址。   

因此，整个程序假定此输出部分始终位于 EXT_MEM 中的该地址。  是这样吗？  如果是，为什么创建了符号 CliScmdSize？  它的用途是什么？

谢谢，此致，

乔治

你好，乔治，

到目前为止，您的假设是正确的，因为外部存储器只读任何外部引用都是在运行时通过自定义处理程序加载的。 截面的大小用于标识生成的 blob 中该特定截面的起始位置。 目前，外部 EEPROM 中有多个部分，因此我必须计算它们的起始地址(使用 ext_mem)和大小。 函数和 CLA prog 以及数学表遵循相同的方案。
该问题位于 HEX 实用程序中，如果我只想为上述的.CLI_SCMD 部分创建十六进制文件，该实用程序将返回错误。

提前感谢托比亚斯·法辛鲍尔