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部件号：TMS320C2801 主题中讨论的其他部件：C2000WARE
您好，
我正在尝试将两个CCS项目从CCS 3.3 迁移到CCS 5.3 (在将项目从CCS 3.1 迁移到CCS 11.1 的路上)。
一个项目已成功移植和构建，但第二个项目存在构建错误。
所有错误都是1.0099万-D错误“program will not fit into available memory (程序无法插入可用内存)”。 对于“.XXX”尺寸YYY第1页，运行定位/阻止失败。”
我检查了一下，看起来真正的问题反映在警告1.6002万-D“构建属性供应商部分TI缺失”中。
出现此警告的原因似乎是代码生成工具链(在CSS 5.3 中)与我们使用并位于DSP280x文件夹中的库SFO_TI_build.lib不匹配。
从我所读的内容(在https://e2e.ti.com/support/tools/code-composer-studio-group/ccs/f/code-composer-studio-forum/23.7376万/warning-16002-d-build-attribute-vendor-section-ti-missing中1.6002万中)中，我们需要将旧的(CSS 3.x)库SFO_TI_builD.lib替换为SFO_TI_V5.lib。
我没有找到关于如何构建或下载它的信息(SFO_TI_V5.lib)。
项目输出类型为DSP/BIOS v5.x应用(可执行文件)
器件系列：C2000，变体：未知TMS320C28XX器件
编译器版本：TI v 6.10
输出格式：传统COFF
DSP/BIOS版本：5.42 ．0.07
链接程序命令文件(DSP281x_Headers_BIOS.cmd)的上下文：
/*
//###########################################################################
//
// FILE: DSP281x_Headers_BIOS.cmd
//
// TITLE: DSP281x Peripheral registers linker command file
//
// DESCRIPTION:
//
// This file is for use in BIOS applications.
//
// Linker command file to place the peripheral structures
// used within the DSP281x headerfiles into the correct memory
// mapped locations.
//
// This version of the file does not include the PieVectorTable structure.
// For non-BIOS applications, please use the DSP281x_Headers_nonBIOS.cmd
// file which includes the PieVectorTable structure.
//
//###########################################################################
//
// Ver | dd mmm yyyy | Who | Description of changes
// =====|=============|======|===============================================
// | 05 Mar 2003 | D.A. | Original based on DSP281x v0.58
// 1.00| 11 Sep 2003 | L.H. | Integrated into DSP281x header files
// | | | Added missing eCAN file sections
// -----|-------------|------|-----------------------------------------------
//###########################################################################
*/
MEMORY
{
PAGE 0: /* Program Memory */
PAGE 1: /* Data Memory */
DEV_EMU : origin = 0x000880, length = 0x000180 /* device emulation registers */
FLASH_REGS : origin = 0x000A80, length = 0x000060 /* FLASH registers */
CSM : origin = 0x000AE0, length = 0x000010 /* code security module registers */
XINTF : origin = 0x000B20, length = 0x000020 /* external interface registers */
CPU_TIMER0 : origin = 0x000C00, length = 0x000008 /* CPU Timer0 registers (CPU Timer1 and Timer2 are reserved for BIOS)*/
PIE_CTRL : origin = 0x000CE0, length = 0x000020 /* PIE control registers */
ECANA : origin = 0x006000, length = 0x000040 /* eCAN control and status registers */
ECANA_LAM : origin = 0x006040, length = 0x000040 /* eCAN local acceptance masks */
ECANA_MOTS : origin = 0x006080, length = 0x000040 /* eCAN message object time stamps */
ECANA_MOTO : origin = 0x0060C0, length = 0x000040 /* eCAN object time-out registers */
ECANA_MBOX : origin = 0x006100, length = 0x000100 /* eCAN mailboxes */
SYSTEM : origin = 0x007010, length = 0x000020 /* System control registers */
SPIA : origin = 0x007040, length = 0x000010 /* SPI registers */
SCIA : origin = 0x007050, length = 0x000010 /* SCI-A registers */
XINTRUPT : origin = 0x007070, length = 0x000010 /* external interrupt registers */
GPIOMUX : origin = 0x0070C0, length = 0x000020 /* GPIO mux registers */
GPIODAT : origin = 0x0070E0, length = 0x000020 /* GPIO data registers */
ADC : origin = 0x007100, length = 0x000020 /* ADC registers */
EVA : origin = 0x007400, length = 0x000040 /* Event Manager A registers */
EVB : origin = 0x007500, length = 0x000040 /* Event Manager B registers */
SCIB : origin = 0x007750, length = 0x000010 /* SCI-B registers */
MCBSPA : origin = 0x007800, length = 0x000040 /* McBSP registers */
CSM_PWL : origin = 0x3F7FF8, length = 0x000008 /* Part of FLASHA. CSM password locations. */
}
SECTIONS
{
/*** The PIE Vector table is called PIEVECT by DSP/BIOS ***/
PieVectTableFile : > PIEVECT, PAGE = 1, TYPE = DSECT
/*** Peripheral Frame 0 Register Structures ***/
DevEmuRegsFile : > DEV_EMU, PAGE = 1
FlashRegsFile : > FLASH_REGS, PAGE = 1
CsmRegsFile : > CSM, PAGE = 1
XintfRegsFile : > XINTF, PAGE = 1
CpuTimer0RegsFile : > CPU_TIMER0, PAGE = 1
PieCtrlRegsFile : > PIE_CTRL, PAGE = 1
/*** Peripheral Frame 1 Register Structures ***/
SysCtrlRegsFile : > SYSTEM, PAGE = 1
SpiaRegsFile : > SPIA, PAGE = 1
SciaRegsFile : > SCIA, PAGE = 1
XIntruptRegsFile : > XINTRUPT, PAGE = 1
GpioMuxRegsFile : > GPIOMUX, PAGE = 1
GpioDataRegsFile : > GPIODAT PAGE = 1
AdcRegsFile : > ADC, PAGE = 1
EvaRegsFile : > EVA, PAGE = 1
EvbRegsFile : > EVB, PAGE = 1
ScibRegsFile : > SCIB, PAGE = 1
McbspaRegsFile : > MCBSPA, PAGE = 1
/*** Peripheral Frame 2 Register Structures ***/
ECanaRegsFile : > ECANA, PAGE = 1
ECanaLAMRegsFile : > ECANA_LAM PAGE = 1
ECanaMboxesFile : > ECANA_MBOX PAGE = 1
ECanaMOTSRegsFile : > ECANA_MOTS PAGE = 1
ECanaMOTORegsFile : > ECANA_MOTO PAGE = 1
/*** Code Security Module Register Structures ***/
CsmPwlFile : > CSM_PWL, PAGE = 1
}
/******************* end of file ************************/
