[参考译文] TMS320F28388D：开始编写引导加载程序、不知道如何获得必要的知识、有几个问题

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Other Parts Discussed in Thread: C2000WARE, CCSTUDIO

请注意，本文内容源自机器翻译，可能存在语法或其它翻译错误，仅供参考。如需获取准确内容，请参阅链接中的英语原文或自行翻译。

https://e2e.ti.com/support/microcontrollers/c2000-microcontrollers-group/c2000/f/c2000-microcontrollers-forum/1114523/tms320f28388d-getting-started-writing-a-bootloader-and-no-idea-how-to-acquire-the-necessary-knowledge-several-questions

器件型号：TMS320F28388D
主题中讨论的其他器件：C2000WARE、 CCStudio

大家好、我是一名在职学生、他收到了为该微控制器编写引导加载程序的任务、但事先没有对此类内容有任何了解。我对 C 语言的了解也相当不可靠。

我已经阅读/浏览了几本手册、例如闪存 API 手册、6k 页的控制器通用手册以及其他手册。在阅读这些手册时、我显然以错误的心态对待他们、我希望他们像我熟悉的文档一样：一份功能列表、其中包含他们的参数以及他们的工作。所以我搜索了"重新启动"等函数、但没有找到任何类似的东西。

我还研究了 C2000Ware 目录中的示例、并尝试了解这些示例。我了解到.cmd 文件的存在及其作用、但我仍然无法完全理解它们。

我的目标是：

1.从 SD 卡读取更新文件，并使用该更新文件的内容(如果存在)覆盖闪存。

2.如果文件不存在或在执行更新后、跳转至主程序。

我的问题：

1.我不知道如何跳转到主程序的地址。我希望一些已经存在的函数为我执行此操作、并将其交给.cmd 文件中的一个地址、但我找不到类似的任何内容。我在 CCStudio 中有主程序和引导加载程序作为单独的项目、并占用了两个项目的2838x_flash_Ink _ecat CPU1.cmd 文件。我将主程序的开头移到了 FLASH4、并希望为引导加载程序保留 FLASH0-FLASH3。

主程序的命令：

MEMORY
{
   /* BEGIN is used for the "boot to Flash" bootloader mode   */
   BEGIN            : origin = 0x088000, length = 0x000002
   BOOT_RSVD        : origin = 0x000002, length = 0x0001AF     /* Part of M0, BOOT rom will use this for stack */
   RAMM0            : origin = 0x0001B1, length = 0x00024F
   RAMM1            : origin = 0x000400, length = 0x0003F8     /* on-chip RAM block M1 */
//   RAMM1_RSVD       : origin = 0x0007F8, length = 0x000008     /* Reserve and do not use for code as per the errata advisory "Memory: Prefetching Beyond Valid Memory" */
   RAMD0            : origin = 0x00C000, length = 0x000800
   RAMD1            : origin = 0x00C800, length = 0x000800
   RAMLS0           : origin = 0x008000, length = 0x000800
   RAMLS1           : origin = 0x008800, length = 0x000800
   RAMLS2           : origin = 0x009000, length = 0x000800
   RAMLS3           : origin = 0x009800, length = 0x000800
   RAMLS4           : origin = 0x00A000, length = 0x000800
   RAMLS5           : origin = 0x00A800, length = 0x000800
   RAMLS6           : origin = 0x00B000, length = 0x000800
   RAMLS7           : origin = 0x00B800, length = 0x000800

   RAMGS0           : origin = 0x00D000, length = 0x001000
   RAMGS1           : origin = 0x00E000, length = 0x001000
   RAMGS2           : origin = 0x00F000, length = 0x001000

   RAMGS3_to_10      : origin = 0x010000, length = 0x008000
/*
   RAMGS3           : origin = 0x010000, length = 0x001000
   RAMGS4           : origin = 0x011000, length = 0x001000
   RAMGS5           : origin = 0x012000, length = 0x001000
   RAMGS6           : origin = 0x013000, length = 0x001000
   RAMGS7           : origin = 0x014000, length = 0x001000
   RAMGS8           : origin = 0x015000, length = 0x001000
   RAMGS9           : origin = 0x016000, length = 0x001000
   RAMGS10          : origin = 0x017000, length = 0x001000*/

   RAMGS11          : origin = 0x018000, length = 0x001000
   RAMGS12          : origin = 0x019000, length = 0x001000
   RAMGS13          : origin = 0x01A000, length = 0x001000
   RAMGS14          : origin = 0x01B000, length = 0x001000
   RAMGS15          : origin = 0x01C000, length = 0x000FF8
//   RAMGS15_RSVD     : origin = 0x01CFF8, length = 0x000008     /* Reserve and do not use for code as per the errata advisory "Memory: Prefetching Beyond Valid Memory" */

   /* Flash sectors */
//   FLASH0           : origin = 0x080002, length = 0x001FFE  /* on-chip Flash */
//   FLASH1           : origin = 0x082000, length = 0x002000  /* on-chip Flash */
//   FLASH2           : origin = 0x084000, length = 0x002000  /* on-chip Flash */
//   FLASH3           : origin = 0x086000, length = 0x002000  /* on-chip Flash */
   FLASH4           : origin = 0x088002, length = 0x007FFE  /* on-chip Flash */
   FLASH5           : origin = 0x090000, length = 0x008000  /* on-chip Flash */
   FLASH6           : origin = 0x098000, length = 0x008000  /* on-chip Flash */
   FLASH7           : origin = 0x0A0000, length = 0x008000  /* on-chip Flash */
   FLASH8           : origin = 0x0A8000, length = 0x008000  /* on-chip Flash */
   FLASH9           : origin = 0x0B0000, length = 0x008000  /* on-chip Flash */
   FLASH10          : origin = 0x0B8000, length = 0x002000  /* on-chip Flash */
   FLASH11          : origin = 0x0BA000, length = 0x002000  /* on-chip Flash */
   FLASH12          : origin = 0x0BC000, length = 0x002000  /* on-chip Flash */
   FLASH13          : origin = 0x0BE000, length = 0x001FF0  /* on-chip Flash */
//   FLASH13_RSVD     : origin = 0x0BFFF0, length = 0x000010  /* Reserve and do not use for code as per the errata advisory "Memory: Prefetching Beyond Valid Memory" */

   CPU1TOCPU2RAM   : origin = 0x03A000, length = 0x000800
   CPU2TOCPU1RAM   : origin = 0x03B000, length = 0x000800
   CPUTOCMRAM      : origin = 0x039000, length = 0x000800
   CMTOCPURAM      : origin = 0x038000, length = 0x000800

   CANA_MSG_RAM     : origin = 0x049000, length = 0x000800
   CANB_MSG_RAM     : origin = 0x04B000, length = 0x000800

   RESET            : origin = 0x3FFFC0, length = 0x000002
}

SECTIONS
{
   codestart           : > BEGIN, ALIGN(8)
   .text               : >> FLASH5 | FLASH6 | FLASH7 | FLASH8, ALIGN(8)
   .cinit              : > FLASH8 | FLASH9 | FLASH10, ALIGN(8)
   .switch             : > FLASH5, ALIGN(8)
   .reset              : > RESET, TYPE = DSECT /* not used, */
   .stack              : > RAMM1

#if defined(__TI_EABI__)
   .init_array      : > FLASH5, ALIGN(8)
   .bss             : >> RAMLS4 | RAMLS5 | RAMLS6 | RAMLS7 | RAMGS2
   .bss:output      : > RAMLS3
   .bss:cio         : > RAMLS5
   .data            : > RAMLS5
   .sysmem          : > RAMLS5
   /* Initalized sections go in Flash */
   .const           : > FLASH10, ALIGN(8)
#else
   .pinit           : > FLASH5, ALIGN(8)
   .ebss            : > RAMLS5
   .esysmem         : > RAMLS5
   .cio             : > RAMLS5
   /* Initalized sections go in Flash */
   .econst          : >> FLASH8 | FLASH9, ALIGN(8)
#endif

   ramgs0 : > RAMGS0, type=NOINIT
   ramgs1 : > RAMGS1, type=NOINIT
   
   PIXDATA_RAM > RAMGS3_to_10, type=NOINIT

   MSGRAM_CPU1_TO_CPU2 : > CPU1TOCPU2RAM, type=NOINIT
   MSGRAM_CPU2_TO_CPU1 : > CPU2TOCPU1RAM, type=NOINIT
   MSGRAM_CPU_TO_CM    : > CPUTOCMRAM, type=NOINIT
   MSGRAM_CM_TO_CPU    : > CMTOCPURAM, type=NOINIT

   /* The following section definition are for SDFM examples */
/*   Filter_RegsFile  : > RAMGS0
   Filter1_RegsFile : > RAMGS1, fill=0x1111
   Filter2_RegsFile : > RAMGS2, fill=0x2222
   Filter3_RegsFile : > RAMGS3, fill=0x3333
   Filter4_RegsFile : > RAMGS4, fill=0x4444
   Difference_RegsFile : >RAMGS5, fill=0x3333 */

   #if defined(__TI_EABI__)
       .TI.ramfunc : {} LOAD = FLASH7,
                        RUN = RAMLS0 | RAMLS1 | RAMLS2 |RAMLS3,
                        LOAD_START(RamfuncsLoadStart),
                        LOAD_SIZE(RamfuncsLoadSize),
                        LOAD_END(RamfuncsLoadEnd),
                        RUN_START(RamfuncsRunStart),
                        RUN_SIZE(RamfuncsRunSize),
                        RUN_END(RamfuncsRunEnd),
                        ALIGN(8)
   #else
       .TI.ramfunc : {} LOAD = FLASH7,
                        RUN = RAMLS0 | RAMLS1 | RAMLS2 |RAMLS3,
                        LOAD_START(_RamfuncsLoadStart),
                        LOAD_SIZE(_RamfuncsLoadSize),
                        LOAD_END(_RamfuncsLoadEnd),
                        RUN_START(_RamfuncsRunStart),
                        RUN_SIZE(_RamfuncsRunSize),
                        RUN_END(_RamfuncsRunEnd),
                        ALIGN(8)
   #endif

}

/*
//===========================================================================
// End of file.
//===========================================================================
*/

引导加载程序的命令(当前错误)

MEMORY
{
   /* BEGIN is used for the "boot to Flash" bootloader mode   */
   BEGIN            : origin = 0x080000, length = 0x000002
   BOOT_RSVD        : origin = 0x000002, length = 0x0001AF     /* Part of M0, BOOT rom will use this for stack */
   RAMM0            : origin = 0x0001B1, length = 0x00024F
   RAMM1            : origin = 0x000400, length = 0x0003F8     /* on-chip RAM block M1 */
//   RAMM1_RSVD       : origin = 0x0007F8, length = 0x000008     /* Reserve and do not use for code as per the errata advisory "Memory: Prefetching Beyond Valid Memory" */
   RAMD0            : origin = 0x00C000, length = 0x000800
   RAMD1            : origin = 0x00C800, length = 0x000800
   RAMLS0           : origin = 0x008000, length = 0x000800
   RAMLS1           : origin = 0x008800, length = 0x000800
   RAMLS2           : origin = 0x009000, length = 0x000800
   RAMLS3           : origin = 0x009800, length = 0x000800
   RAMLS4           : origin = 0x00A000, length = 0x000800
   RAMLS5           : origin = 0x00A800, length = 0x000800
   RAMLS6           : origin = 0x00B000, length = 0x000800
   RAMLS7           : origin = 0x00B800, length = 0x000800

   RAMGS0           : origin = 0x00D000, length = 0x001000
   RAMGS1           : origin = 0x00E000, length = 0x001000
   RAMGS2           : origin = 0x00F000, length = 0x001000

   RAMGS3_to_10      : origin = 0x010000, length = 0x008000
/*
   RAMGS3           : origin = 0x010000, length = 0x001000
   RAMGS4           : origin = 0x011000, length = 0x001000
   RAMGS5           : origin = 0x012000, length = 0x001000
   RAMGS6           : origin = 0x013000, length = 0x001000
   RAMGS7           : origin = 0x014000, length = 0x001000
   RAMGS8           : origin = 0x015000, length = 0x001000
   RAMGS9           : origin = 0x016000, length = 0x001000
   RAMGS10          : origin = 0x017000, length = 0x001000*/

   RAMGS11          : origin = 0x018000, length = 0x001000
   RAMGS12          : origin = 0x019000, length = 0x001000
   RAMGS13          : origin = 0x01A000, length = 0x001000
   RAMGS14          : origin = 0x01B000, length = 0x001000
   RAMGS15          : origin = 0x01C000, length = 0x000FF8
//   RAMGS15_RSVD     : origin = 0x01CFF8, length = 0x000008     /* Reserve and do not use for code as per the errata advisory "Memory: Prefetching Beyond Valid Memory" */

   /* Flash sectors */
   FLASH0           : origin = 0x080002, length = 0x001FFE  /* on-chip Flash */
   FLASH1           : origin = 0x082000, length = 0x002000  /* on-chip Flash */
   FLASH2           : origin = 0x084000, length = 0x002000  /* on-chip Flash */
   FLASH3           : origin = 0x086000, length = 0x002000  /* on-chip Flash */
//   FLASH4           : origin = 0x088000, length = 0x008000  /* on-chip Flash */
//   FLASH5           : origin = 0x090000, length = 0x008000  /* on-chip Flash */
//   FLASH6           : origin = 0x098000, length = 0x008000  /* on-chip Flash */
//   FLASH7           : origin = 0x0A0000, length = 0x008000  /* on-chip Flash */
//   FLASH8           : origin = 0x0A8000, length = 0x008000  /* on-chip Flash */
//   FLASH9           : origin = 0x0B0000, length = 0x008000  /* on-chip Flash */
//   FLASH10          : origin = 0x0B8000, length = 0x002000  /* on-chip Flash */
//   FLASH11          : origin = 0x0BA000, length = 0x002000  /* on-chip Flash */
//   FLASH12          : origin = 0x0BC000, length = 0x002000  /* on-chip Flash */
//   FLASH13          : origin = 0x0BE000, length = 0x001FF0  /* on-chip Flash */
//   FLASH13_RSVD     : origin = 0x0BFFF0, length = 0x000010  /* Reserve and do not use for code as per the errata advisory "Memory: Prefetching Beyond Valid Memory" */

   CPU1TOCPU2RAM   : origin = 0x03A000, length = 0x000800
   CPU2TOCPU1RAM   : origin = 0x03B000, length = 0x000800
   CPUTOCMRAM      : origin = 0x039000, length = 0x000800
   CMTOCPURAM      : origin = 0x038000, length = 0x000800

   CANA_MSG_RAM     : origin = 0x049000, length = 0x000800
   CANB_MSG_RAM     : origin = 0x04B000, length = 0x000800

   RESET            : origin = 0x3FFFC0, length = 0x000002
}

SECTIONS
{
   codestart           : > BEGIN, ALIGN(8)
   .text               : >> FLASH1 | FLASH2 | FLASH3,   ALIGN(8)
   .cinit              : > FLASH2 | FLASH3, ALIGN(8)
   .switch             : > FLASH1, ALIGN(8)
   .reset              : > RESET, TYPE = DSECT /* not used, */
   .stack              : > RAMM1

#if defined(__TI_EABI__)
   .init_array      : > FLASH1, ALIGN(8)
   .bss             : >> RAMLS4 | RAMLS5 | RAMLS6 | RAMLS7 | RAMGS2
   .bss:output      : > RAMLS3
   .bss:cio         : > RAMLS5
   .data            : > RAMLS5
   .sysmem          : > RAMLS5
   /* Initalized sections go in Flash */
   .const           : > FLASH3, ALIGN(8)
#else
   .pinit           : > FLASH1, ALIGN(8)
   .ebss            : > RAMLS5
   .esysmem         : > RAMLS5
   .cio             : > RAMLS5
   /* Initalized sections go in Flash */
   .econst          : >> FLASH2 | FLASH3, ALIGN(8)
#endif

   ramgs0 : > RAMGS0, type=NOINIT
   ramgs1 : > RAMGS1, type=NOINIT
   
   PIXDATA_RAM > RAMGS3_to_10, type=NOINIT

   MSGRAM_CPU1_TO_CPU2 : > CPU1TOCPU2RAM, type=NOINIT
   MSGRAM_CPU2_TO_CPU1 : > CPU2TOCPU1RAM, type=NOINIT
   MSGRAM_CPU_TO_CM    : > CPUTOCMRAM, type=NOINIT
   MSGRAM_CM_TO_CPU    : > CMTOCPURAM, type=NOINIT

   /* The following section definition are for SDFM examples */
/*   Filter_RegsFile  : > RAMGS0
   Filter1_RegsFile : > RAMGS1, fill=0x1111
   Filter2_RegsFile : > RAMGS2, fill=0x2222
   Filter3_RegsFile : > RAMGS3, fill=0x3333
   Filter4_RegsFile : > RAMGS4, fill=0x4444
   Difference_RegsFile : >RAMGS5, fill=0x3333 */

   #if defined(__TI_EABI__)
       .TI.ramfunc : {} LOAD = FLASH3,
                        RUN = RAMLS0 | RAMLS1 | RAMLS2 |RAMLS3,
                        LOAD_START(RamfuncsLoadStart),
                        LOAD_SIZE(RamfuncsLoadSize),
                        LOAD_END(RamfuncsLoadEnd),
                        RUN_START(RamfuncsRunStart),
                        RUN_SIZE(RamfuncsRunSize),
                        RUN_END(RamfuncsRunEnd),
                        ALIGN(8)
   #else
       .TI.ramfunc : {} LOAD = FLASH3,
                        RUN = RAMLS0 | RAMLS1 | RAMLS2 |RAMLS3,
                        LOAD_START(_RamfuncsLoadStart),
                        LOAD_SIZE(_RamfuncsLoadSize),
                        LOAD_END(_RamfuncsLoadEnd),
                        RUN_START(_RamfuncsRunStart),
                        RUN_SIZE(_RamfuncsRunSize),
                        RUN_END(_RamfuncsRunEnd),
                        ALIGN(8)
   #endif

}

/*
//===========================================================================
// End of file.
//===========================================================================
*/

你可能得到了我所尝试的操作。但是、假设地址正确且方法正确、如何从引导加载程序跳转到主程序的起始地址？

从文档中可以看到，这样的内容应该已经足够了，但我从未使用过：int juo_TO_MAIN_program(){ return 0x088002;}

2.我不知道如何访问/读取 SD 卡。我的项目中有一些 MMC_F2828x.c 文件、允许我访问驱动器、还有一个处理 files/FRESULT 的 ff.h 文件。我尝试使用以下代码段打开一个仅包含字符串'hello'的文件：

fresult = f_open (&update_file、"/hello"、fa_read)；

但它不起作用(很抱歉、未格式化的代码段、但本网站不允许我使用 C 代码段。) 我还需要以某种方式使用 disk_read()。我很有信心在最后自己弄清楚 SD 卡的内容、但是、我无法确定如何跳转到特定地址、如何覆盖闪存的特定部分以及如何订购引导加载程序和主程序。我对这项任务感到非常失落。

如果有人能告诉我如何学习这些内容、我会非常感激。我还查看了 C2000 Academy、但它对我根本没有帮助。我感觉自己只是蛮力强迫事情、不知道我在做什么、这与我通常使用 python 或 rust 进行的开发任务相反。

3 年多前

0 admin 3 年多前

TI__Guru**** 2611705 points

请注意，本文内容源自机器翻译，可能存在语法或其它翻译错误，仅供参考。如需获取准确内容，请参阅链接中的英语原文或自行翻译。

尊敬的 Vincenzo：

对拖延答复表示歉意。首先、请注意、开发引导加载程序的任务并不简单、如果您对 C 语言的理解不够充分、这将是一项挑战。您似乎已经意识到了知识差距、请分配足够的带宽来完成学习曲线以实施您的解决方案。

F2838x 是我们比较复杂的器件之一。它包含三个 CPU。因此、我们首先建议您确定自己的要求是什么？您将使用哪种引导模式？

我们有多种资源可助您一臂之力。一个很好的开始位置是《F2838x 技术参考手册》。 https://www.ti.com/lit/pdf/spruii0c

您可以查看第5章。

此时、无需担心如何跳转到和运行应用程序。请专注于设计和实现与主机通信并将 F2838x 应用程序引入目标。

您是否拥有 C2000Ware 并运行了一些示例以更熟悉 F2838x 器件？

您还可以学习此应用手册： https://www.ti.com/lit/an/sprabv4e/sprabv4e.pdf

请根据您对上述文档中提供的详细信息的理解、向我们提出具体问题。

此致、

Krishna

C2000™︎ 微控制器（参考译文帖）

C2000™︎ 微控制器（参考译文帖）(Read Only)

[参考译文] TMS320F28388D：开始编写引导加载程序、不知道如何获得必要的知识、有几个问题