主题中讨论的其他器件:C2000WARE
大家好、
以下是客户可能需要您帮助的一些问题:
我使用示波器测试 SPI 通信时序。 SPIA 自接收和自发送、SPIA 主器件和 SPIB 从器件分别经过测试。
CCS 调试接口在 SPIA 自接收和自检期间正常显示。 示波器测量 SCLK、如下图所示、8个脉冲在一组中、单个脉冲的宽度为12.4us (高电平和低电平时间均为6.2us)、但每组脉冲之间将有31.4us 的时间间隔。 这是正常的吗?

测量了 SIMO 引脚、发现它将继续发送相同的数据。 测量时间约为32.3ms、数据重复约243次。 如何解决此问题?

以下是 SPIA 自接收和自发送的程序:
/*
* SPI self-receive and self-transmit
*
*/
#include "F28x_Project.h"
typedef unsigned char Uint8;
//statement
void gpio_init(); //Configure all GPIO ports connected to the PCB board (including 3-wire SPI)
void spia_init();
void spia_xmit(Uint8 a);
//global variable
char sdata;
char rdata;
void main()
{
//initialization
InitSysCtrl();
InitGpio();
DINT;//disable interrupt
InitPieCtrl();
IER = 0x0000;
IFR = 0x0000;
InitPieVectTable();
gpio_init();
spia_init();
sdata = 0x0045;
for(;;)
{
spia_xmit(sdata);
while(SpiaRegs.SPISTS.bit.INT_FLAG != 1){}
rdata = SpiaRegs.SPIRXBUF;
sdata++;
}
}
void gpio_init()
{
/*
* 60 SPICLKA_DA SPIA CLK
* 59 SPISOMIA_DA SPIA SOMI
* 58 SPISIMOA_DA SPIA SIMO
*/
EALLOW;
//SPI
//DA(enable、asynchronous、SPI)
GpioCtrlRegs.GPBPUD.bit.GPIO60 = 0;
GpioCtrlRegs.GPBQSEL2.bit.GPIO60 = 3;
GpioCtrlRegs.GPBMUX2.bit.GPIO60 = 3;
GpioCtrlRegs.GPBGMUX2.bit.GPIO60 = 3;//SPICLKA
GpioCtrlRegs.GPBPUD.bit.GPIO59 = 0;
GpioCtrlRegs.GPBQSEL2.bit.GPIO59 = 3;
GpioCtrlRegs.GPBMUX2.bit.GPIO59 = 3;
GpioCtrlRegs.GPBGMUX2.bit.GPIO59 = 3;//SPISOMIA
GpioCtrlRegs.GPBPUD.bit.GPIO58 = 0;
GpioCtrlRegs.GPBQSEL2.bit.GPIO58 = 3;
GpioCtrlRegs.GPBMUX2.bit.GPIO58 = 3;
GpioCtrlRegs.GPBGMUX2.bit.GPIO58 = 3;//SPISIMOA
EDIS;
}
void spia_init()
{
//DAC1282 clock polarity(CPOL)is 0,clock phase(CPHA)is 0
//Configuration Control Register(8 bits reserved,0000 0000 0000 0111 = 0x0007)
SpiaRegs.SPICCR.bit.SPISWRESET = 0;//SPI reset
SpiaRegs.SPICCR.bit.CLKPOLARITY = 0;//clock polarity is 0(SCK idle is low)
SpiaRegs.SPICCR.bit.HS_MODE = 0;//Turn off high speed mode
SpiaRegs.SPICCR.bit.SPILBK = 1;//Turn off loopback mode
SpiaRegs.SPICCR.bit.SPICHAR = (8-1);//Word length 8 bits
//运行控制寄存器(11位保留,0000 0000 0000 0110 = 0x0006)
SpiaRegs.SPICTL.bit.OVERRUNINTENA = 1;//Disable receive overflow interrupt
SpiaRegs.SPICTL.bit.CLK_PHASE = 0;//clock phase is 0(Sampled on the first transition edge)
SpiaRegs.SPICTL.bit.MASTER_SLAVE = 1;//MCU master
SpiaRegs.SPICTL.bit.TALK = 1;//enable master transmit
SpiaRegs.SPICTL.bit.SPIINTENA = 0;//disable SPI interrupt
//SpiaRegs.SPISTS.all = 0;
//baud rate register(9 bits reserved,0000 0000 0000 007C)
/*
* LSPCLKfreq=CPUfreq/n //(n=1,2,4,6,8,10,12,14)
* SPI Baud Rate=LSPCLKfreq/(SPIBRR+1)
* without adding an external auxiliary clock
* The CPU frequency of F28379D is 10MHz, the corresponding minimum low-speed peripheral clock is 715KHz, and the minimum baud rate is 5586SPS
* This minimum baud rate is greater than the maximum baud rate 4000SPS when FIR filter mode is selected
* Therefore, the Sinc filter mode is selected, the baud rate is set to 8000SPS, and the frequency is divided by 10,SPIBRR=124=0x007C
*/
EALLOW;
ClkCfgRegs.LOSPCP.all = 0x0005;//101(divide by 10)
EDIS;
SpiaRegs.SPIBRR.bit.SPI_BIT_RATE = 0x007C;
//Priority Control Register
SpiaRegs.SPIPRI.bit.FREE = 1;//Free run during simulation, pause on breakpoint does not stop SPI
//Stop SPI software reset ready to receive or transmit
SpiaRegs.SPICCR.bit.SPISWRESET = 1;
}
void spia_xmit(Uint8 a)
{
SpiaRegs.SPITXBUF = a;//Pass 8-bit data to serial transmit buffer
}
用于 SPIA 主器件 SPIB 从器件测试的连接:
SPIA CLK-SPIB CLK
SPIA SIMO-SPIB SOMI
SPIA SOMI-SPIB SIMO
SCLK 波形与 SPIA 波形相同、但在正常运行一段时间后、调试接口显示 RDATA 始终为 FFFF、SpiaRegs.spits 位.INT_flag 始终为1、而 while 环路不能跳出。 这应该如何解决?

针对 SPIA 主器件和 SPIB 从器件的程序:
/*
*
*
*/
#include "F28x_Project.h"
typedef unsigned char Uint8;
void gpio_init();
void spia_init();
void spia_xmit(Uint8 a);
void spib_init();
void spib_xmit(Uint8 a);
char sdata;
char rdata;
int i;
void main()
{
InitSysCtrl();
InitGpio();//GPIO
DINT;
InitPieCtrl();
IER = 0x0000;
IFR = 0x0000;
InitPieVectTable();
gpio_init();
spia_init();
spib_init();
sdata = 0x0000;
rdata = 0x0000;
for(;;)
{
spia_xmit(sdata);
while(SpibRegs.SPISTS.bit.INT_FLAG != 1){}
rdata = SpibRegs.SPIRXBUF;
sdata++;
}
}
void gpio_init()
{
/*
* 60 SPICLKA_DA SPIA CLK
* 59 SPISOMIA_DA SPIA SOMI
* 58 SPISIMOA_DA SPIA SIMO
*
* 65 SPICLKB_AD SPIB CLK
* 64 SPISOMIB_AD SPIB SOMI
* 63 SPISIMOB_AD SPIB SIMO
*/
EALLOW;
//SPI
//DA
GpioCtrlRegs.GPBPUD.bit.GPIO60 = 0;
GpioCtrlRegs.GPBQSEL2.bit.GPIO60 = 3;
GpioCtrlRegs.GPBMUX2.bit.GPIO60 = 3;
GpioCtrlRegs.GPBGMUX2.bit.GPIO60 = 3;//SPICLKA
GpioCtrlRegs.GPBPUD.bit.GPIO59 = 0;
GpioCtrlRegs.GPBQSEL2.bit.GPIO59 = 3;
GpioCtrlRegs.GPBMUX2.bit.GPIO59 = 3;
GpioCtrlRegs.GPBGMUX2.bit.GPIO59 = 3;//SPISOMIA
GpioCtrlRegs.GPBPUD.bit.GPIO58 = 0;
GpioCtrlRegs.GPBQSEL2.bit.GPIO58 = 3;
GpioCtrlRegs.GPBMUX2.bit.GPIO58 = 3;
GpioCtrlRegs.GPBGMUX2.bit.GPIO58 = 3;//SPISIMOA
//SPI
//DA
GpioCtrlRegs.GPCPUD.bit.GPIO65 = 0;
GpioCtrlRegs.GPCQSEL1.bit.GPIO65 = 3;
GpioCtrlRegs.GPCMUX1.bit.GPIO65 = 3;
GpioCtrlRegs.GPCGMUX1.bit.GPIO65 = 3;//SPICLKB
GpioCtrlRegs.GPCPUD.bit.GPIO64 = 0;
GpioCtrlRegs.GPCQSEL1.bit.GPIO64 = 3;
GpioCtrlRegs.GPCMUX1.bit.GPIO64 = 3;
GpioCtrlRegs.GPCGMUX1.bit.GPIO64 = 3;//SPISOMIB
GpioCtrlRegs.GPBPUD.bit.GPIO63 = 0;
GpioCtrlRegs.GPBQSEL2.bit.GPIO63 = 3;
GpioCtrlRegs.GPBMUX2.bit.GPIO63 = 3;
GpioCtrlRegs.GPBGMUX2.bit.GPIO63 = 3;//SPISIMOB
EDIS;
}
void spia_init()
{
SpiaRegs.SPICCR.bit.SPISWRESET = 0;
SpiaRegs.SPICCR.bit.CLKPOLARITY = 0;
SpiaRegs.SPICCR.bit.HS_MODE = 0;
SpiaRegs.SPICCR.bit.SPILBK = 1;
SpiaRegs.SPICCR.bit.SPICHAR = (8-1);
SpiaRegs.SPICTL.bit.OVERRUNINTENA = 1;
SpiaRegs.SPICTL.bit.CLK_PHASE = 0;
SpiaRegs.SPICTL.bit.MASTER_SLAVE = 1;//MCU master
SpiaRegs.SPICTL.bit.TALK = 1;
SpiaRegs.SPICTL.bit.SPIINTENA = 0;
//SpiaRegs.SPISTS.all = 0;
/*
* LSPCLKfreq=CPUfreq/n //(n=1,2,4,6,8,10,12,14)
* SPI Baud Rate=LSPCLKfreq/(SPIBRR+1)
*
*
*
*
*/
EALLOW;
ClkCfgRegs.LOSPCP.all = 0x0005;//101
EDIS;
SpiaRegs.SPIBRR.bit.SPI_BIT_RATE = 0x007C;
SpiaRegs.SPIPRI.bit.FREE = 1;
SpiaRegs.SPICCR.bit.SPISWRESET = 1;
}
void spib_init()
{
SpibRegs.SPICCR.bit.SPISWRESET = 0;
SpibRegs.SPICCR.bit.CLKPOLARITY = 0;
SpibRegs.SPICCR.bit.HS_MODE = 0;
SpibRegs.SPICCR.bit.SPILBK = 1;
SpibRegs.SPICCR.bit.SPICHAR = (8-1);
SpibRegs.SPICTL.bit.OVERRUNINTENA = 1;
SpibRegs.SPICTL.bit.CLK_PHASE = 0;
SpibRegs.SPICTL.bit.MASTER_SLAVE = 0;//MCU master
SpibRegs.SPICTL.bit.TALK = 1;
SpibRegs.SPICTL.bit.SPIINTENA = 0;
//SpiaRegs.SPISTS.all = 0;
/*
* LSPCLKfreq=CPUfreq/n //(n=1,2,4,6,8,10,12,14)
* SPI Baud Rate=LSPCLKfreq/(SPIBRR+1)
*
*
*
*
*/
EALLOW;
ClkCfgRegs.LOSPCP.all = 0x0005;//101
EDIS;
SpibRegs.SPIBRR.bit.SPI_BIT_RATE = 0x007C;
SpibRegs.SPIPRI.bit.FREE = 1;
SpibRegs.SPICCR.bit.SPISWRESET = 1;
}
void spia_xmit(Uint8 a)
{
SpiaRegs.SPITXBUF = a;
}
谢谢、此致
耶鲁李
