请注意,本文内容源自机器翻译,可能存在语法或其它翻译错误,仅供参考。如需获取准确内容,请参阅链接中的英语原文或自行翻译。
器件型号:TMS320F28069M 你(们)好
我已经用触发中断的2个字来设置 SCI RX FIFO (当 TX-FIFO 被禁用时)。 中断在 FIFO 下工作正常,但我不断得到 SCI_getRxFifoStatus()的零计数,这表明 RX FIFO 中没有接收到数据(实际上发生中断时)。
之前未使用 FIFO 的代码、它以115K2和57K6波特运行正常。 定制板的硬件没有问题。
我已经阅读过数据表和示例演示代码几次、似乎不使用 SCI_getRxFifoStatus 来获取演示代码中 FIFO 填充的计数。
下面附加了代码和调试寄存器转储。 我正在使用 hal 对象来设置 FIFO RX 中断。
我错过了什么吗?
#pragma CODE_SECTION(SCI_RX_ISR,"ramfuncs");
uint16_t NoOfData;
interrupt void SCI_RX_ISR(void)
{
uint16_t success;
HAL_Obj *obj = (HAL_Obj *)halHandle;
zUDT_Obj *uobj = (zUDT_Obj *) zUDTHandle;
SCI_Obj *sci = (SCI_Obj *)obj->sciHandle[0];
PIE_clearInt(obj->pieHandle,PIE_GroupNumber_9); // acknowledge interrupt from SCI group so that SCI interrupt
CPU_disableGlobalInts(obj->cpuHandle);
//while(SCI_getRxFifoStatus(halHandle->sciHandle[0]) == SCI_FifoStatus_Empty)
//{};
//---------------------------------------Read data into buffer.
NoOfData = ((sci->SCIFFRX) >>8) & 0x000F;
for (int i=0; i<NoOfData; i++)
{
void HAL_setupSCI(HAL_Handle handle)
{
HAL_Obj *obj = (HAL_Obj *) handle;
SCI_Obj *sci = (SCI_Obj *)obj->sciHandle[0];
SCI_reset(obj->sciHandle[0]);
SCI_enableTx(obj->sciHandle[0]);
SCI_enableRx(obj->sciHandle[0]); // SCICTL1.RXENA Bit 0.
//---------------------------------------Serial Definition
SCI_setNumStopBits(obj->sciHandle[0], SCI_NumStopBits_One);
//SCI_setParity(obj->sciHandle[0], SCI_Parity_Odd);
SCI_disableParity(obj->sciHandle[0]);
SCI_disableLoopBack(obj->sciHandle[0]);
//SCI_setBaudRate(obj->sciHandle[0], SCI_BaudRateRVP_57_6_kBaud); //Reliable use.
SCI_setBaudRate(obj->sciHandle[0], SCI_BaudRateRVP_115_2_kBaud); //Not so reliable, Maybe FIFO help
SCI_setCharLength(obj->sciHandle[0], SCI_CharLength_8_Bits);
//========================================RX Side Only with FIFO setup. Updated RP:30/Apr/21.
// This is working FIFO setting from demo code.
// SCIFFRX = 0x2022
// SCICTL2 = 0x00C2
// SCICTL1 = 0x0023
//----------------sci->SCIFFRX =0x0022; // Bit 5 and 1
SCI_setRxFifoIntLevel(obj->sciHandle[0],(SCI_FifoLevel_e)SCI_FifoLevel_2_Words);
SCI_enableRxFifoInt(obj->sciHandle[0]);
//----------------sci->SCIFFCT=0x00; // Autoband off, not needed. Default is 0 anyway.
sci->SCIFFCT=0x00;
//----------------sci->SCICTL2 |= SCI_SCICTL2_RX_INT_ENA_BITS;
SCI_enableRxInt(obj->sciHandle[0]);
//----------------sci->SCIFFRX |= SCI_SCIFFRX_FIFO_RESET_BITS;
sci->SCIFFRX |= SCI_SCIFFRX_FIFO_RESET_BITS;
//SCI_enableRxFifo(obj->sciHandle[0]); // This set bit 13 of SCIFFRX
//SCI_resetRxFifo(obj->sciHandle[0]);
//=========================================TX Side Only, no FIFO since it polling.
SCI_disableTxWake(obj->sciHandle[0]);
SCI_disableSleep(obj->sciHandle[0]);
//SCI_enableTxFifo(obj->sciHandle[0]);
//SCI_enableTxFifoEnh(obj->sciHandle[0]);
SCI_disableTxInt(obj->sciHandle[0]);
//---------------------------------------Misc.
SCI_setMode(obj->sciHandle[0], SCI_Mode_IdleLine);
SCI_setPriority(obj->sciHandle[0],SCI_Priority_FreeRun);
//---------------------------------------Activate SCI
SCI_enable(obj->sciHandle[0]);
//---------------------------------------System INT.
PIE_enableInt(obj->pieHandle,PIE_GroupNumber_9,PIE_InterruptSource_SCIARX); // enable SCIA RX interrupt in PIE
SCI_enableRxInt(obj->sciHandle[0]); // for both FIFO or non-FIFO use. // enable SCIA RX interrupt
CPU_enableInt(obj->cpuHandle,CPU_IntNumber_9);
