[参考译文] TMS320F280025：TMS32F280025

您好、HK Woo、

感谢您的提问。 请参阅以下嵌套指南、它将引导您完成(1)中断的自定义优先级和(2)中断嵌套：

https://software-dl.ti.com/C2000/docs/c28x_interrupt_nesting/html/index.html

在 interrupts 文件夹(interrupts_ex1_sw_Prioritization)下的 driverlib 中还有一个用于此操作的软件示例

此致、

Vince

您好、HK Woo、

请查看示例代码中的"driverlib\f28002x\examples\interrupt\sw_particited_isr_levels.h"文件。 这允许您为每个中断写入所需的优先级。 评论中对这一点作了充分的解释。

此致、

Vince

从 interrupt_ex3_sw_prioration.c 中删除

//! For most applications, the hardware prioritizing of the interrupts is
//! sufficient. For applications that need custom prioritizing, this example
//! illustrates how this can be done through software.User specific priorities
//! can be configured in sw_prioritized_isr_level.h header file.

来自 sw_prioritized_isr_levels.h

//
// Set "Global" Interrupt Priority Level (IER register):
//
// The user must set the appropriate priority level for each of the CPU
// interrupts. This is termed as the "global" priority. The priority level
// must be a number between 1 (highest) to 16 (lowest). A value of 0 must
// be entered for reserved interrupts or interrupts that are not used.
//
// Note: The priority levels below are used to calculate the IER register
//       interrupt masks MINT1 to MINT16.
//
// Note: The priority levels shown here may not make sense in a
//       real application.  This is for demonstration purposes only!!!
//
//       The user should change these to values that make sense for
//       their application.
//
// 0  = not used
// 1  = highest priority
// ...
// 16 = lowest priority
//
#define INT1PL      16       // Global Priority for Group1 Interrupts
#define INT2PL      0        // Global Priority for Group2 Interrupts
#define INT3PL      0        // Global Priority for Group3 Interrupts
#define INT4PL      0        // Global Priority for Group4 Interrupts
#define INT5PL      0        // Global Priority for Group5 Interrupts
#define INT6PL      0        // Global Priority for Group6 Interrupts
#define INT7PL      0        // Global Priority for Group7 Interrupts
#define INT8PL      0        // Global Priority for Group8 Interrupts
#define INT9PL      0        // Global Priority for Group9 Interrupts
#define INT10PL     0        // Global Priority for Group10 Interrupts
#define INT11PL     0        // Global Priority for Group11 Interrupts
#define INT12PL     0        // Global Priority for Group12 Interrupts
#define INT13PL     7        // Global Priority for INT13 (TINT1)
#define INT14PL     1        // Global Priority for INT14 (TINT2)
#define INT15PL     0        // Global Priority for DATALOG
#define INT16PL     0        // Global Priority for RTOSINT

//
// Set "Group" Interrupt Priority Level (PIEIER1 to PIEIER12 registers):
//
// The user must set the appropriate priority level for each of the PIE
// interrupts. This is termed as the "group" priority. The priority level
// must be a number between 1 (highest) to 16 (lowest). A value of 0 must
// be entered for reserved interrupts or interrupts that are not used.
//
// Note: The priority levels below are used to calculate the following
//       PIEIER register interrupt masks:
//       MG1_1 to MG1_16
//       MG2_1 to MG2_16
//       MG3_1 to MG3_16
//       MG4_1 to MG4_16
//       MG5_1 to MG5_16
//       MG6_1 to MG6_16
//       MG7_1 to MG7_16
//       MG8_1 to MG8_16
//       MG9_1 to MG9_16
//       MG10_1 to MG10_16
//       MG11_1 to MG11_16
//       MG12_1 to MG12_16
//
// Note: The priority levels shown here may not make sense in a
//       real application.  This is for demonstration purposes only!!!
//
//       The user should change these to values that make sense for
//       their application.
//
// 0  = not used
// 1  = highest priority
// ...
// 16  = lowest priority
//
#define G1_1PL      0       // ADCA1_INT
#define G1_2PL      0       // Reserved
#define G1_3PL      0       // ADCC1_INT
#define G1_4PL      0       // XINT1_INT
#define G1_5PL      0       // XINT2_INT
#define G1_6PL      0       // Reserved
#define G1_7PL      4       // TIMER0_INT
#define G1_8PL      0       // WAKE_INT
#define G1_9PL      0       // Reserved
#define G1_10PL     0       // Reserved
#define G1_11PL     0       // Reserved
#define G1_12PL     0       // Reserved
#define G1_13PL     0       // Reserved
#define G1_14PL     0       // Reserved
#define G1_15PL     0       // Reserved
#define G1_16PL     0       // Reserved

#define G2_1PL      0       // EPWM1_TZ_INT
#define G2_2PL      0       // EPWM2_TZ_INT
#define G2_3PL      0       // EPWM3_TZ_INT
#define G2_4PL      0       // EPWM4_TZ_INT
#define G2_5PL      0       // EPWM5_TZ_INT
#define G2_6PL      0       // EPWM6_TZ_INT
#define G2_7PL      0       // EPWM7_TZ_INT
// ETC...

请尝试不修改运行此示例、以查看它是否在您的系统上工作。 然后一次修改一点、以了解如何执行中断嵌套和优先级排序。

您好！

请将项目导入 CCS 并按"Debug"按钮。

此致、

Vince

否、默认情况下不是。 TRM 的中断一章对此进行了说明。

您好！

有关中断延迟的详细信息、请参阅此主题：

https://e2e.ti.com/support/microcontrollers/c2000-microcontrollers-group/c2000/f/c2000-microcontrollers-forum/922457/tms320f280049-maximum-interrupt-latency

此致、

Vince