[参考译文] TMS320F28335：CPU 在断电/接通后不运行、但是在闪存加载后运行

尊敬的  Matt é o：

当您加载并重新启动器件时、您是否能够在内存浏览器中看到闪存维护程序？

我们会在第二天内回复您。

谢谢。

查理

您好！

我不知道如何查看闪存是否在内存中保留了程序。

 在电源打开/关闭之后、我尝试在 UniFlash 中执行"验证映像"、但出现了"Target is not connected"错误、即使电源打开也是如此。

感谢您的回答

Matt é o.  

好的、我设法使用验证图像对其进行检查、然后按下该输出  

[成功] C28xx：//的程序验证成功

所以我认为闪存会维护程序吗？

再次感谢您

Matt é o.

尊敬的  Matt é o：

一种使用 Uniflash 检查闪存是否保持其存储器的方法是在器件连接后转到"Memory"选项卡、搜索闪存扇区中的程序位置。

是的、如果它能够验证程序、这意味着它检查了发送给器件的内容。  

如果在关闭/打开 DSP 时仍然遇到没有运行的程序、我会首先检查引导至闪存的入口点(存储器中的地址0x33FF6)。 此外、确保引导引脚设置为闪存引导模式。  

请告诉我有关这方面的最新情况。  

谢谢。

查理

您好！

感谢您的清晰回答以及所有的屏幕截图

在硬件侧、引导模式的所有 GPIO 未连接、因此由于内部上拉、如果我没有错、我想我处于闪存模式。

然后、在 UniFlash 上、 在器件上执行开/关操作后、我在引导至闪存入口点看到以下代码：

因为,在被编程后(我尝试了"运行目标后程序加载/闪存操作" ceckbox 选中和取消选中,我有同样的事情),我有这在我的内存:

再次感谢您

此致

Matt é o.

我认为这可能会有所帮助,所以让我给你提供我的.cmd 文件:

外部闪存
｛
Page 0：/*程序存储器*/
/*存储器(RAM/FLASH/OTP)块可以移动到页1进行数据分配*/

ZONE0：origin = 0x004000、length = 0x001000 /* XINTF zone 0 */
RAMFUNCS：origin = 0x008000，length = 0x003000 /*片上 RAM block L0 to L2 */
ZONE6：origin = 0x100000、length = 0x100000 /* XINTF zone 6 */
ZONE7A：origin = 0x200000，length = 0x00FC00 /* XINTF zone 7 - program space */
Begin_flash_appli：origin = 0x3002FE，length = 0x000002 /*部分 FLASHH。 用于瓦特引导加载程序 flash_application entry point。 */
FLASH_appli : origin = 0x300300300, length = 0x02FD00 /*部分 FLASHH、FLASHG、FLASHF、FLASHE、FLASHD FLASHC 用于应用*/
FLASHA：origin = 0x338000、length = 0x007F80 /*片上 FLASHA、用于引导加载程序*/
CSM_RSVD：origin = 0x33FF80、length = 0x000076 /*部分 FLASHA。 当 CSM 正在使用时、全为0x0000编程。 */
begin：origin = 0x33FFF6、length = 0x000002 /*部分 FLASHA。 用于"引导至闪存"引导加载程序模式。 */
CSM_PWL：origin = 0x33FFF8，length = 0x000008 /*部分 FLASHA。 FLASHA 中的 CSM 密码位置*/
OTP：origin = 0x380400、length = 0x000400 /*片上 OTP */
ADC_CAL：origin = 0x380080、length = 0x000009 /*保留存储器中的 ADC_cal 函数*/

//IQTABLES：origin = 0x3FE000，length = 0x000b50 /* Boot ROM 中的 IQMath 表*/
//IQTABLES2：origin = 0x3FEB50，length = 0x00008c /* Boot ROM 中的 IQMath 表*/
FPUBLES：origin = 0x3FEBDC，length = 0x0006A0 /* Boot ROM 中的 FPU 表*/
ROM：origin = 0x3FF27C，length = 0x000D44 /* Boot ROM */
复位：origin = 0x3FFFC0，length = 0x000002 /*启动 ROM 的一部分*/
vectors : origin = 0x3FFFc2, length = 0x00003E /* part of boot ROM */

第1页：/*数据存储器*/
/*存储器(RAM/FLASH/OTP)块可以移动到 PAGE0进行程序分配*/
/*寄存器仍保留在页1上*/

BOOT_RSVD：origin = 0x000000、length = 0x000050 /* M0的一部分，引导 ROM 将此用于堆栈*/
RAMM0：origin = 0x000050，length = 0x0003B0 /*片上 RAM 块 M0 */
RAMM1：origin = 0x000400，length = 0x000400 /*片上 RAM 块 M1 */
RAMM2：origin = 0x002000、length = 0x001000 /*片上 RAM 块 M2 */
RAM_GLOBAL_VAR：origin = 0x00B000，length = 0x004B00 /*片上 RAM 块 L3至 L6和 L7*/的一部分
RAM_ADCRESULT：origin = 0x00FB00，length = 0x000400 /*片上 RAM 块 L7*/的最后部分
ZONE7B：origin = 0x20FC00，length = 0x000400 /* XINTF zone 7 - data space */
FLASHB : origin = 0x330000 , length = 0x008000 /*片上 FLASH */
}

/*将段分配给内存块。
注：
DSP28_CodeStartBranch.asm 中的 codestart 用户定义部分用于重定向代码
引导至闪存时执行该代码
ramfuncs 的用户定义的部分、用于存储将从闪存复制到 RAM 中的函数
*/

部分
｛

/*分配计划领域:*/
.cinit：> flash_appli page = 0
.pinit：> flash_appli、page = 0
.text：> flash_appli page = 0
codestart：> Begin_flash_appli page = 0
ramfuncs：load = flash_appli，
运行= RAMFUNCS、/* RAML0、*/
Load_start (_RamfuncsLoadStart)、
Load_End (_RamfuncsLoadEnd)、
RUN_START (_RamfuncsRunStart)、
PAGE = 0

.FPUtables：load = flash_appli
RUN = RAMFUNCS、
Load_start (_FPUtablesLoadStart)、
Load_End (_FPUtablesLoadEnd)、
RUN_START (_FPUtablesRunStart)、
PAGE = 0
｛
-l rts2800_fpu32_fast_补充.lib
//-l rts2800_fpu32_fast_补充_coff.lib
}

csmppasswds :> csm_PWL page = 0
csm_rsvd :> csm_RSVD page = 0

/*分配未初始化的数据段：*/
.stack：> RAMM1 page = 1.
.ebss：> RAM_GLOBAL_VAR page = 1.
.esysmem :> RAMM2页面= 1.
.sysmem：> RAM_GLOBAL_VAR page = 1.

/*初始化段进入闪存*/
/*要使 SDFlash 对这些字节进行编程，它们必须被分配到 PAGE 0 */
econst：> flash_appli page = 0
.switch：> flash_appli page = 0

/*分配 IQ 数学区域：*/
//IQmath :> flash_appli page = 0 /* Math Code */
//IQmathTables :> IQTABLES，PAGE = 0，TYPE = NoLoad

/*如果调用 IQNexp()或 IQexp()，请取消注释以下部分
库中的 C 代码函数、以便使用
引导 ROM 中的相关 IQMath 表(这样可以节省空间和引导 ROM
1个等待状态)。 如果未取消注释该段、则为 IQmathTables2
将加载到其他存储器(SARAM、闪存等)中、并将其加载
为 up 空间、但等待状态为0是可行的。
*/
/*
IQmathTables2：>IQTABLES2、PAGE = 0、TYPE = NoLoad
｛

IQmath.lib 重复使用 (IQmathTablesRam)

}
*/

FPUmathTables :> FPUTABLES , PAGE = 0, TYPE = NoLoad

/*分配 DMA 可访问的 RAM 段：*/
DMARAML4 :> RAM_ADCRESULT，PAGE = 1
DMARAML5 :> RAM_ADCRESULT，PAGE = 1
DMARAML6：> RAM_ADCRESULT、PAGE = 1
DMARAML7：> RAM_ADCRESULT、PAGE = 1

/*分配 XINTF 区域7的0x400用于存储数据*/
ZONE7DATA :> ZONE7B, PAGE = 1.

/*.reset 是编译器使用的标准段。 它包含*/
/* C 代码的_c_int00起始地址。 /*
/*使用引导 ROM 时、此段和 CPU 矢量*/
不需要/*表。 因此、此处将默认类型设置为*/
/* DSECT */
.reset：>RESET、PAGE = 0、TYPE = DSECT
VECTORS :> VECTORS PAGE = 0, TYPE = DSECT

/*分配 ADC_cal 函数(工厂预编程到 TI 保留的存储器中)*/
.adc_cal：load = adc_CAL、page = 0、type = NoLoad
CRC16_TABLE：> RAM_GLOBAL_VAR page = 1.
}
/*

外部闪存
｛
Page 0：/*程序存储器*/

第1页：/*数据存储器*/

DEV_EMU：origin = 0x000880，length = 0x000180 /*器件仿真寄存器*/
FLASH_regs：origin = 0x000A80、length = 0x000060 /* FLASH register */
CSM : origin = 0x000AE0 , length = 0x000010 /*代码安全模块寄存器*/

adc_mirror：origin = 0x000B00、length = 0x000010 /* ADC 结果寄存器镜像*/

XINTF：origin = 0x000B20，length = 0x000020 /* external interface registers */

CPU_TIMER0：origin = 0x000C00、length = 0x000008 /* CPU Timer0寄存器*/
CPU_Timer1：origin = 0x000C08、length = 0x000008 /* CPU Timer0寄存器(CPU Timer1 & Timer2保留 TI 使用)*/
CPU_TIMER2：origin = 0x000C10、length = 0x000008 /* CPU Timer0寄存器(CPU Timer1 & Timer2保留 TI 使用)*/

PIE_CTRL：origin = 0x000CE0，length = 0x000020 /* PIE 控制寄存器*/
PIE_VECT：origin = 0x000D00，length = 0x000100 /* PIE Vector Table */

DMA：origin = 0x001000、length = 0x000200 /* dma register */

MCBSPA：origin = 0x005000，length = 0x000040 /* McBSP-A 寄存器*/
MCBSPB：origin = 0x005040，length = 0x000040 /* McBSP-B 寄存器*/

ECANA：origin = 0x006000，length = 0x000040 /* eCAN-A 控制及状态寄存器*/
ECANA_LAM：origin = 0x006040，length = 0x000040 /* eCAN-A 局部接受屏蔽*/
eCANA_MOTS : origin = 0x006080 , length = 0x000040 /* eCAN-A 报文对象时间戳*/
ECANA_MOTO：origin = 0x0060C0，length = 0x000040 /* eCAN-A object time-out register */
ECANA_MBOX : origin = 0x006100 , length = 0x000100 /* eCAN-A mailbox */

ECANB：origin = 0x006200、length = 0x000040 /* eCAN-B 控制和状态寄存器*/
ECANB_LAM：origin = 0x006240、length = 0x000040 /* eCAN-B 本地接受屏蔽*/
ECANB_MOTS：origin = 0x006280、length = 0x000040 /* eCAN-B 报文对象时间戳*/
ECANB_MOTO：origin = 0x0062C0、length = 0x000040 /* eCAN-B 对象超时寄存器*/
ECANB_MBOX : origin = 0x006300 , length = 0x000100 /* eCAN-B mailbox */

// EPWM1：origin = 0x006800，length = 0x000022 /* Enhanced PWM 1 registers */
// EPWM2：origin = 0x006840，length = 0x000022 /* Enhanced PWM 2 register */
// EPWM3：origin = 0x006880，length = 0x000022 /* Enhanced PWM 3 register */
// EPWM4：origin = 0x0068C0，length = 0x000022 /* Enhanced PWM 4 register */
// EPWM5：origin = 0x006900，length = 0x000022 /* Enhanced PWM 5寄存器*/
// EPWM6：origin = 0x006940，length = 0x000022 /* Enhanced PWM 6 registers */

EPWM1：origin = 0x005800、length = 0x000022 /* Enhanced PWM 1寄存器*/
EPWM2：origin = 0x005840，length = 0x000022 /* Enhanced PWM 2 register */
EPWM3：origin = 0x005880，length = 0x000022 /* Enhanced PWM 3 register */
EPWM4：origin = 0x0058C0，length = 0x000022 /* Enhanced PWM 4 register */
EPWM5：origin = 0x005900，length = 0x000022 /* Enhanced PWM 5 register */
EPWM6：origin = 0x005940，length = 0x000022 /* Enhanced PWM 6 register */

eCAP1：origin = 0x006A00、length = 0x000020 /* Enhanced Capture 1寄存器*/
ECAP2：origin = 0x006A20、length = 0x000020 /* Enhanced Capture 2 registers */
ECAP3：origin = 0x006A40，length = 0x000020 /* Enhanced Capture 3 registers */
ECAP4：origin = 0x006A60，length = 0x000020 /* Enhanced Capture 4寄存器*/
ECAP5：origin = 0x006A80，length = 0x000020 /* Enhanced Capture 5 registers */
ECAP6：origin = 0x006AA0，length = 0x000020 /* Enhanced Capture 6 registers */

EQEP1：origin = 0x006B00，length = 0x000040 /* Enhanced QEP 1 registers */
EQEP2：origin = 0x006B40，length = 0x000040 /* Enhanced QEP 2 registers */

GPIOCTRL : origin = 0x006F80 , length = 0x000040 /* GPIO control register */
GPIODAT : origin = 0x006FC0、length = 0x000020 /* GPIO data register */
GPIOINT：origin = 0x006FE0，length = 0x000020 /* GPIO interrupt/LPM 寄存器*/

系统: origin = 0x007010, length = 0x000020 /*系统控制寄存器*/
SPIA：origin = 0x007040、length = 0x000010 /* SPI-A register */
SCIA：origin = 0x007050，length = 0x000010 /* SCI-A register */
XINTRUPT：origin = 0x007070、length = 0x000010 /* external interrupt register */

ADC：origin = 0x007100，length = 0x000020 /* ADC registers */

SCIB：origin = 0x007750，length = 0x000010 /* SCI-B 寄存器*/

SCIC：origin = 0x007770，length = 0x000010 /* SCI-C register */

I2CA：origin = 0x007900、length = 0x000040 /* I2C-A register */

CSM_PWL：origin = 0x33FFF8，length = 0x000008 /*部分 FLASHA。 CSM 密码位置。 */

PARTID：origin = 0x380090，length = 0x00000001 /* PARTID 寄存器位置*/
}

部分
｛
PieVectTableFile :> PIE_VECT, page = 1.

/***外设帧0寄存器结构***/
DevEmuRegsFile：>DEV_EMU，page = 1
FlashRegsFile：> flash_regs, page = 1.
CsmRegsFile：> csm，page = 1.
AdcMirrorFile :>ADC_mirror,页面= 1.
XintfRegsFile :> XINTF, page = 1.
CpuTimer0RegsFile：> CPU_TIMER0、page = 1
CpuTimer1RegsFile：> CPU_Timer1、page = 1
CpuTimer2RegsFile：> CPU_TIMER2、page = 1
PieCtrlRegsFile :> PIE_CTRL , page = 1.
DmaRegsFile :> DMA, page = 1.

/***外设帧3寄存器结构***/
McbspaRegsFile：>MCBSPA、PAGE = 1
McbspbRegsFile :> MCBSPB, page = 1.

/***外设帧1寄存器结构***/
ECanaRegsFile :> ECANA, page = 1.
ECanaLAMRegsFile :> ECANA_LAM page = 1.
ECanaMboxesFile :> ECANA_MBOX page = 1.
ECanaMOTSRegsFile :> ecANA_mots page = 1.
ECanaMOTORegsFile :> ECANA_MOTO PAGE = 1.

ECanbRegsFile :> ECANB, page = 1.
ECanbLAMRegsFile :> ECANB_LAM page = 1.
ECanbMboxesFile :> ECANB_MBOX page = 1.
ECanbMOTSRegsFile :> ECANB_MOTS page = 1.
ECanbMOTORegsFile :> ECANB_MOTO PAGE = 1.

EPwm1RegsFile :> EPWM1 page = 1.
EPwm2RegsFile :> EPWM2 page = 1.
EPwm3RegsFile :> EPWM3 page = 1.
EPwm4RegsFile :> EPWM4 page = 1.
EPwm5RegsFile :> EPWM5 page = 1.
EPwm6RegsFile :> EPWM6 page = 1.

ECap1RegsFile :> ECAP1 page = 1.
ECap2RegsFile :> ECAP2 page = 1.
ECap3RegsFile :> ECAP3 page = 1.
ECap4RegsFile :> ECAP4 page = 1.
ECap5RegsFile :> ECAP5 page = 1.
ECap6RegsFile :> ECAP6 page = 1.

EQep1RegsFile :> EQEP1 page = 1.
EQep2RegsFile :> EQEP2 page = 1.

GpioCtrlRegsFile：> GPIOCTRL page = 1.
GpioDataRegsFile :> GPIODAT page = 1.
GpioIntRegsFile :> GPIOINT page = 1.

/***外设帧2寄存器结构***/
SysCtrlRegsFile：> system, page = 1.
SpiaRegsFile :> SPIA, page = 1.
SciaRegsFile :> SCIA, page = 1.
XIntruptRegsFile：> XINTRUPT、PAGE = 1
AdcRegsFile :> ADC, page = 1.
ScibRegsFile :> SCIB, page = 1.
ScicRegsFile :> SCIC, page = 1.
I2caRegsFile :> I2CA, page = 1.

/***代码安全模块寄存器结构***/
csmPwlFile :> csm_PWL, page = 1.

/***器件 ID 寄存器结构***/
PartIdRegsFile :> PARTID, page = 1.

}

外部闪存
｛
Page 0：/*程序存储器*/

upgrade_metadata : origin = 0x300000, length = 0x000004 /* upgrade metadata registers */
application_metadata：origin = 0x300004，length = 0x0002FA /* upgrade metadata registers */

第1页：/*数据存储器*/


}

部分
｛
UpgradeMetadataFile :> upgrade_metadata , page = 0
ApplicationMetaFile :> application_metadata, page = 0

SharedDataFile :> RAMM0 , page = 1.
}

好的，最后一件事：  

当我关闭/打开我的 DSP 电源时、我的存储器中的所有内容都是"0BAD"

此致

Matt é o.

Matt é o,

您是否有可能损坏 PIE 中断使能寄存器？  如果关/开连接导致0BAD、但加载程序会将存储器清零、那么我会检查闪存加载是否中断。 此外、我还会检查堆栈使用情况。  

谢谢。此致、

查理

您好！

感谢您关注我的问题。  

让我向您展示我正在使用的.cmd 文件：

/*
// TI File $Revision: /main/8 $
// Checkin $Date: June 2, 2008 11:12:24 $
//###########################################################################
//
// FILE: DSP2833x_Headers_nonBIOS.cmd
//
// TITLE: DSP2833x Peripheral registers linker command file
//
// DESCRIPTION:
//
// This file is for use in Non-BIOS applications.
//
// Linker command file to place the peripheral structures
// used within the DSP2833x headerfiles into the correct memory
// mapped locations.
//
// This version of the file includes the PieVectorTable structure.
// For BIOS applications, please use the DSP2833x_Headers_BIOS.cmd file
// which does not include the PieVectorTable structure.
//
//###########################################################################
*/

// Version History:
//=============================================================================
// Ver | dd mmm yyyy | Who | Description of changes
// =====|=============|=======|================================================
// 1.0 | 02 Jun 2008 | TI | Release Version
// 2.0 | 06 Sep 2011 | WattC | ePWM mapping changed from 0x68xx to 0x58xx for DMA access
//=============================================================================

MEMORY
{
PAGE 0: /* Program Memory */

PAGE 1: /* Data Memory */

DEV_EMU : origin = 0x000880, length = 0x000180 /* device emulation registers */
FLASH_REGS : origin = 0x000A80, length = 0x000060 /* FLASH registers */
CSM : origin = 0x000AE0, length = 0x000010 /* code security module registers */

ADC_MIRROR : origin = 0x000B00, length = 0x000010 /* ADC Results register mirror */

XINTF : origin = 0x000B20, length = 0x000020 /* external interface registers */

CPU_TIMER0 : origin = 0x000C00, length = 0x000008 /* CPU Timer0 registers */
CPU_TIMER1 : origin = 0x000C08, length = 0x000008 /* CPU Timer0 registers (CPU Timer1 & Timer2 reserved TI use)*/
CPU_TIMER2 : origin = 0x000C10, length = 0x000008 /* CPU Timer0 registers (CPU Timer1 & Timer2 reserved TI use)*/

PIE_CTRL : origin = 0x000CE0, length = 0x000020 /* PIE control registers */
PIE_VECT : origin = 0x000D00, length = 0x000100 /* PIE Vector Table */

DMA : origin = 0x001000, length = 0x000200 /* DMA registers */

MCBSPA : origin = 0x005000, length = 0x000040 /* McBSP-A registers */
MCBSPB : origin = 0x005040, length = 0x000040 /* McBSP-B registers */

ECANA : origin = 0x006000, length = 0x000040 /* eCAN-A control and status registers */
ECANA_LAM : origin = 0x006040, length = 0x000040 /* eCAN-A local acceptance masks */
ECANA_MOTS : origin = 0x006080, length = 0x000040 /* eCAN-A message object time stamps */
ECANA_MOTO : origin = 0x0060C0, length = 0x000040 /* eCAN-A object time-out registers */
ECANA_MBOX : origin = 0x006100, length = 0x000100 /* eCAN-A mailboxes */

ECANB : origin = 0x006200, length = 0x000040 /* eCAN-B control and status registers */
ECANB_LAM : origin = 0x006240, length = 0x000040 /* eCAN-B local acceptance masks */
ECANB_MOTS : origin = 0x006280, length = 0x000040 /* eCAN-B message object time stamps */
ECANB_MOTO : origin = 0x0062C0, length = 0x000040 /* eCAN-B object time-out registers */
ECANB_MBOX : origin = 0x006300, length = 0x000100 /* eCAN-B mailboxes */

// EPWM1 : origin = 0x006800, length = 0x000022 /* Enhanced PWM 1 registers */
// EPWM2 : origin = 0x006840, length = 0x000022 /* Enhanced PWM 2 registers */
// EPWM3 : origin = 0x006880, length = 0x000022 /* Enhanced PWM 3 registers */
// EPWM4 : origin = 0x0068C0, length = 0x000022 /* Enhanced PWM 4 registers */
// EPWM5 : origin = 0x006900, length = 0x000022 /* Enhanced PWM 5 registers */
// EPWM6 : origin = 0x006940, length = 0x000022 /* Enhanced PWM 6 registers */

EPWM1 : origin = 0x005800, length = 0x000022 /* Enhanced PWM 1 registers */
EPWM2 : origin = 0x005840, length = 0x000022 /* Enhanced PWM 2 registers */
EPWM3 : origin = 0x005880, length = 0x000022 /* Enhanced PWM 3 registers */
EPWM4 : origin = 0x0058C0, length = 0x000022 /* Enhanced PWM 4 registers */
EPWM5 : origin = 0x005900, length = 0x000022 /* Enhanced PWM 5 registers */
EPWM6 : origin = 0x005940, length = 0x000022 /* Enhanced PWM 6 registers */

ECAP1 : origin = 0x006A00, length = 0x000020 /* Enhanced Capture 1 registers */
ECAP2 : origin = 0x006A20, length = 0x000020 /* Enhanced Capture 2 registers */
ECAP3 : origin = 0x006A40, length = 0x000020 /* Enhanced Capture 3 registers */
ECAP4 : origin = 0x006A60, length = 0x000020 /* Enhanced Capture 4 registers */
ECAP5 : origin = 0x006A80, length = 0x000020 /* Enhanced Capture 5 registers */
ECAP6 : origin = 0x006AA0, length = 0x000020 /* Enhanced Capture 6 registers */

EQEP1 : origin = 0x006B00, length = 0x000040 /* Enhanced QEP 1 registers */
EQEP2 : origin = 0x006B40, length = 0x000040 /* Enhanced QEP 2 registers */

GPIOCTRL : origin = 0x006F80, length = 0x000040 /* GPIO control registers */
GPIODAT : origin = 0x006FC0, length = 0x000020 /* GPIO data registers */
GPIOINT : origin = 0x006FE0, length = 0x000020 /* GPIO interrupt/LPM registers */

SYSTEM : origin = 0x007010, length = 0x000020 /* System control registers */
SPIA : origin = 0x007040, length = 0x000010 /* SPI-A registers */
SCIA : origin = 0x007050, length = 0x000010 /* SCI-A registers */
XINTRUPT : origin = 0x007070, length = 0x000010 /* external interrupt registers */

ADC : origin = 0x007100, length = 0x000020 /* ADC registers */

SCIB : origin = 0x007750, length = 0x000010 /* SCI-B registers */

SCIC : origin = 0x007770, length = 0x000010 /* SCI-C registers */

I2CA : origin = 0x007900, length = 0x000040 /* I2C-A registers */

CSM_PWL : origin = 0x33FFF8, length = 0x000008 /* Part of FLASHA. CSM password locations. */

PARTID : origin = 0x380090, length = 0x000001 /* Part ID register location */
}

SECTIONS
{
PieVectTableFile : > PIE_VECT, PAGE = 1

/*** Peripheral Frame 0 Register Structures ***/
DevEmuRegsFile : > DEV_EMU, PAGE = 1
FlashRegsFile : > FLASH_REGS, PAGE = 1
CsmRegsFile : > CSM, PAGE = 1
AdcMirrorFile : > ADC_MIRROR, PAGE = 1
XintfRegsFile : > XINTF, PAGE = 1
CpuTimer0RegsFile : > CPU_TIMER0, PAGE = 1
CpuTimer1RegsFile : > CPU_TIMER1, PAGE = 1
CpuTimer2RegsFile : > CPU_TIMER2, PAGE = 1
PieCtrlRegsFile : > PIE_CTRL, PAGE = 1
DmaRegsFile : > DMA, PAGE = 1

/*** Peripheral Frame 3 Register Structures ***/
McbspaRegsFile : > MCBSPA, PAGE = 1
McbspbRegsFile : > MCBSPB, PAGE = 1

/*** Peripheral Frame 1 Register Structures ***/
ECanaRegsFile : > ECANA, PAGE = 1
ECanaLAMRegsFile : > ECANA_LAM PAGE = 1
ECanaMboxesFile : > ECANA_MBOX PAGE = 1
ECanaMOTSRegsFile : > ECANA_MOTS PAGE = 1
ECanaMOTORegsFile : > ECANA_MOTO PAGE = 1

ECanbRegsFile : > ECANB, PAGE = 1
ECanbLAMRegsFile : > ECANB_LAM PAGE = 1
ECanbMboxesFile : > ECANB_MBOX PAGE = 1
ECanbMOTSRegsFile : > ECANB_MOTS PAGE = 1
ECanbMOTORegsFile : > ECANB_MOTO PAGE = 1

EPwm1RegsFile : > EPWM1 PAGE = 1
EPwm2RegsFile : > EPWM2 PAGE = 1
EPwm3RegsFile : > EPWM3 PAGE = 1
EPwm4RegsFile : > EPWM4 PAGE = 1
EPwm5RegsFile : > EPWM5 PAGE = 1
EPwm6RegsFile : > EPWM6 PAGE = 1

ECap1RegsFile : > ECAP1 PAGE = 1
ECap2RegsFile : > ECAP2 PAGE = 1
ECap3RegsFile : > ECAP3 PAGE = 1
ECap4RegsFile : > ECAP4 PAGE = 1
ECap5RegsFile : > ECAP5 PAGE = 1
ECap6RegsFile : > ECAP6 PAGE = 1

EQep1RegsFile : > EQEP1 PAGE = 1
EQep2RegsFile : > EQEP2 PAGE = 1

GpioCtrlRegsFile : > GPIOCTRL PAGE = 1
GpioDataRegsFile : > GPIODAT PAGE = 1
GpioIntRegsFile : > GPIOINT PAGE = 1

/*** Peripheral Frame 2 Register Structures ***/
SysCtrlRegsFile : > SYSTEM, PAGE = 1
SpiaRegsFile : > SPIA, PAGE = 1
SciaRegsFile : > SCIA, PAGE = 1
XIntruptRegsFile : > XINTRUPT, PAGE = 1
AdcRegsFile : > ADC, PAGE = 1
ScibRegsFile : > SCIB, PAGE = 1
ScicRegsFile : > SCIC, PAGE = 1
I2caRegsFile : > I2CA, PAGE = 1

/*** Code Security Module Register Structures ***/
CsmPwlFile : > CSM_PWL, PAGE = 1

/*** Device Part ID Register Structures ***/
PartIdRegsFile : > PARTID, PAGE = 1

}

/*
//===========================================================================
// End of file.
//===========================================================================
*/

/*
//###########################################################################
//
// FILE: F28335.cmd
//
// TITLE: Linker Command File For F28335 Device
//
//###########################################################################
// $TI Release: F2833x/F2823x Header Files and Peripheral Examples V140 $
// $Release Date: March 4, 2015 $
// $Copyright: Copyright (C) 2007-2015 Texas Instruments Incorporated -
// http://www.ti.com/ ALL RIGHTS RESERVED $
//###########################################################################
*/

/* ======================================================
// For Code Composer Studio V2.2 and later
// ---------------------------------------
// In addition to this memory linker command file,
// add the header linker command file directly to the project.
// The header linker command file is required to link the
// peripheral structures to the proper locations within
// the memory map.
//
// The header linker files are found in <base>\DSP2833x_Headers\cmd
//
// For BIOS applications add: DSP2833x_Headers_BIOS.cmd
// For nonBIOS applications add: DSP2833x_Headers_nonBIOS.cmd
========================================================= */

/* ======================================================
// For Code Composer Studio prior to V2.2
// --------------------------------------
// 1) Use one of the following -l statements to include the
// header linker command file in the project. The header linker
// file is required to link the peripheral structures to the proper
// locations within the memory map */

/* Uncomment this line to include file only for non-BIOS applications */
/* -l DSP2833x_Headers_nonBIOS.cmd */

/* Uncomment this line to include file only for BIOS applications */
/* -l DSP2833x_Headers_BIOS.cmd */

/* 2) In your project add the path to <base>\DSP2833x_headers\cmd to the
library search path under project->build options, linker tab,
library search path (-i).
/*========================================================= */

/* Define the memory block start/length for the F28335
PAGE 0 will be used to organize program sections
PAGE 1 will be used to organize data sections

Notes:
Memory blocks on F28335 are uniform (ie same
physical memory) in both PAGE 0 and PAGE 1.
That is the same memory region should not be
defined for both PAGE 0 and PAGE 1.
Doing so will result in corruption of program
and/or data.

L0/L1/L2 and L3 memory blocks are mirrored - that is
they can be accessed in high memory or low memory.
For simplicity only one instance is used in this
linker file.

Contiguous SARAM memory blocks can be combined
if required to create a larger memory block.
*/

MEMORY
{
PAGE 0: /* Program Memory */
/* Memory (RAM/FLASH/OTP) blocks can be moved to PAGE1 for data allocation */

ZONE0 : origin = 0x004000, length = 0x001000 /* XINTF zone 0 */
RAML0 : origin = 0x008000, length = 0x001000 /* on-chip RAM block L0 */
RAML1 : origin = 0x009000, length = 0x001000 /* on-chip RAM block L1 */
RAML2 : origin = 0x00A000, length = 0x001000 /* on-chip RAM block L2 */
RAML3 : origin = 0x00B000, length = 0x001000 /* on-chip RAM block L3 */
ZONE6 : origin = 0x0100000, length = 0x100000 /* XINTF zone 6 */
ZONE7A : origin = 0x0200000, length = 0x00FC00 /* XINTF zone 7 - program space */
// FLASHH : origin = 0x300000, length = 0x008000 /* on-chip FLASH */
FLASHG : origin = 0x308000, length = 0x008000 /* on-chip FLASH */
FLASHF : origin = 0x310000, length = 0x008000 /* on-chip FLASH */
FLASHE : origin = 0x318000, length = 0x008000 /* on-chip FLASH */
FLASHD : origin = 0x320000, length = 0x008000 /* on-chip FLASH */
FLASHC : origin = 0x328000, length = 0x008000 /* on-chip FLASH */
FLASHA : origin = 0x338000, length = 0x007F80 /* on-chip FLASH */
CSM_RSVD : origin = 0x33FF80, length = 0x000076 /* Part of FLASHA. Program with all 0x0000 when CSM is in use. */
BEGIN : origin = 0x33FFF6, length = 0x000002 /* Part of FLASHA. Used for "boot to Flash" bootloader mode. */
CSM_PWL : origin = 0x33FFF8, length = 0x000008 /* Part of FLASHA. CSM password locations in FLASHA */
OTP : origin = 0x380400, length = 0x000400 /* on-chip OTP */
ADC_CAL : origin = 0x380080, length = 0x000009 /* ADC_cal function in Reserved memory */

IQTABLES : origin = 0x3FE000, length = 0x000b50 /* IQ Math Tables in Boot ROM */
IQTABLES2 : origin = 0x3FEB50, length = 0x00008c /* IQ Math Tables in Boot ROM */
FPUTABLES : origin = 0x3FEBDC, length = 0x0006A0 /* FPU Tables in Boot ROM */
ROM : origin = 0x3FF27C, length = 0x000D44 /* Boot ROM */
RESET : origin = 0x3FFFC0, length = 0x000002 /* part of boot ROM */
VECTORS : origin = 0x3FFFC2, length = 0x00003E /* part of boot ROM */

PAGE 1 : /* Data Memory */
/* Memory (RAM/FLASH/OTP) blocks can be moved to PAGE0 for program allocation */
/* Registers remain on PAGE1 */

BOOT_RSVD : origin = 0x000000, length = 0x000050 /* Part of M0, BOOT rom will use this for stack */
RAMM0 : origin = 0x000050, length = 0x0003B0 /* on-chip RAM block M0 */
RAMM1 : origin = 0x000400, length = 0x000400 /* on-chip RAM block M1 */
RAML4 : origin = 0x00C000, length = 0x001000 /* on-chip RAM block L1 */
RAML5 : origin = 0x00D000, length = 0x001000 /* on-chip RAM block L1 */
RAML6 : origin = 0x00E000, length = 0x001000 /* on-chip RAM block L1 */
RAML7 : origin = 0x00F000, length = 0x001000 /* on-chip RAM block L1 */
ZONE7B : origin = 0x20FC00, length = 0x000400 /* XINTF zone 7 - data space */
FLASHB : origin = 0x330000, length = 0x008000 /* on-chip FLASH */
}

/* Allocate sections to memory blocks.
Note:
codestart user defined section in DSP28_CodeStartBranch.asm used to redirect code
execution when booting to flash
ramfuncs user defined section to store functions that will be copied from Flash into RAM
*/

SECTIONS
{

/* Allocate program areas: */
.cinit : > FLASHA PAGE = 0
.pinit : > FLASHA, PAGE = 0
.text : > FLASHA PAGE = 0
codestart : > BEGIN PAGE = 0
ramfuncs : LOAD = FLASHD,
RUN = RAML0,
LOAD_START(_RamfuncsLoadStart),
LOAD_END(_RamfuncsLoadEnd),
RUN_START(_RamfuncsRunStart),
LOAD_SIZE(_RamfuncsLoadSize),
PAGE = 0

csmpasswds : > CSM_PWL PAGE = 0
csm_rsvd : > CSM_RSVD PAGE = 0

/* Allocate uninitalized data sections: */
.stack : > RAMM1 PAGE = 1
.ebss : > RAML4 PAGE = 1
.esysmem : > RAMM1 PAGE = 1

/* Initalized sections go in Flash */
/* For SDFlash to program these, they must be allocated to page 0 */
.econst : > FLASHA PAGE = 0
.switch : > FLASHA PAGE = 0

/* Allocate IQ math areas: */
IQmath : > FLASHC PAGE = 0 /* Math Code */
IQmathTables : > IQTABLES, PAGE = 0, TYPE = NOLOAD

/* Uncomment the section below if calling the IQNexp() or IQexp()
functions from the IQMath.lib library in order to utilize the
relevant IQ Math table in Boot ROM (This saves space and Boot ROM
is 1 wait-state). If this section is not uncommented, IQmathTables2
will be loaded into other memory (SARAM, Flash, etc.) and will take
up space, but 0 wait-state is possible.
*/
/*
IQmathTables2 : > IQTABLES2, PAGE = 0, TYPE = NOLOAD
{

IQmath.lib<IQNexpTable.obj> (IQmathTablesRam)

}
*/

FPUmathTables : > FPUTABLES, PAGE = 0, TYPE = NOLOAD

/* Allocate DMA-accessible RAM sections: */
DMARAML4 : > RAML4, PAGE = 1
DMARAML5 : > RAML5, PAGE = 1
DMARAML6 : > RAML6, PAGE = 1
DMARAML7 : > RAML7, PAGE = 1

/* Allocate 0x400 of XINTF Zone 7 to storing data */
ZONE7DATA : > ZONE7B, PAGE = 1

/* .reset is a standard section used by the compiler. It contains the */
/* the address of the start of _c_int00 for C Code. /*
/* When using the boot ROM this section and the CPU vector */
/* table is not needed. Thus the default type is set here to */
/* DSECT */
.reset : > RESET, PAGE = 0, TYPE = DSECT
vectors : > VECTORS PAGE = 0, TYPE = DSECT

/* Allocate ADC_cal function (pre-programmed by factory into TI reserved memory) */
.adc_cal : load = ADC_CAL, PAGE = 0, TYPE = NOLOAD

}

/*
//===========================================================================
// End of file.
//===========================================================================
*/

/****************************************************************************
*
* Copyright (c) 2012 by Watt Consulting
*
* This software is copyrighted by and is the sole property of
* Watt Consulting. All rights, title, ownership, or other interests
* in the software remain the property of Watt Consulting. This
* software may only be used in accordance with the corresponding
* license agreement. Any unauthorized use, duplication, transmission,
* distribution, or disclosure of this software is expressly forbidden.
*
* This Copyright notice may not be removed or modified without prior
* written consent of Watt Consulting.
*
* Watt Consulting reserves the right to modify this software without notice.
*
* Watt Consulting
* 23 rue Alexis de Tocqueville
* 92160 Antony, FRANCE
* contact@watt-consulting.com
****************************************************************************/

/****************************************************************************
*
* CONFIDENTIAL NOTICE
*
* This document contains information confidential and proprietary to
* Watt Consulting .The information may not be used, disclosed or reproduced
* without the prior written authorization of Watt Consulting and those so
* authorized may only use the information for the purpose of evaluation
* consistent with authorization. Reproduction of any section of this document
* must include this legend.
****************************************************************************/

//=============================================================================
///
/// @file MetadataHeader.cmd
///
/// @brief Linker command file for metadata shared between Bootloader and Application
///
/// @author Watt Consulting Team
//=============================================================================

MEMORY
{
PAGE 0: /* Program Memory */

UPGRADE_METADATA : origin = 0x300000, length = 0x000004 /* upgrade metadata registers */
APPLICATION_METADATA : origin = 0x300004, length = 0x0002FA /* upgrade metadata registers */

PAGE 1: /* Data Memory */


}

SECTIONS
{
UpgradeMetadataFile : > UPGRADE_METADATA , PAGE = 0
ApplicationMetadataFile : > APPLICATION_METADATA, PAGE = 0

SharedDataFile : > RAMM0 , PAGE = 1
}

/*
//===========================================================================
// End of file.
//===========================================================================
*/

此外、当我查看关闭/打开时、我又看一下存储器是怎样的、看起来我的存储器中具有0xFFFF、值与关闭/打开之前的值相同

你好 Vamsi Gudivada 你是否设法采取了这一看?

此致

Matt é o.

尊敬的  Matt é o：

我们让我们的 F28335闪存专家来看看这个。  他会在几天内回复您。

谢谢。此致、
Vamsi

非常感谢您提供此更新

此致

Matt é o.

Matt é o,

是否可以使用 CCS 与 Uniflash 连接到目标、使用该 IDE 进行调试？

我想尝试以下内容：

1) 1)使用 CCS 连接到目标

2)加载您的.out 文件(其效果与 Uniflash 相同、调用闪存 API 并对器件进行编程)

3)在"Run->Reset->CPU Reset (运行->复位-> CPU 复位)"下执行"CPU Reset (CPU 复位)"

4) 4)验证代码是否正在地址0x3F FFC0处等待

5)运行代码、halt、注意停止时的位置。

如果与上述操作在一起、代码在主代码中处于停止状态、那么单机版不应起作用是没有原因的、但如果单机版不应起作用、这也是单机版不能起作用的原因。

我们需要返回并开始调试为什么代码没有到达 main；但我会让您尝试以上操作、看看在#5处发生了什么。

此致！

Matthew

Matthew 您好！  
首先,很抱歉耽误了时间,我得去做其他项目。
感谢您观看本视频。

我不理解第一步"使用 CCS 连接到目标"。 我没有在 CCS 中找到"CONNECT"按钮。 您是指启动调试会话... ？

感谢您的回答

此致

Matt é o Gerlin

Matt é o,

我想调用调试会话、但要采用与传统调试会话一键式按钮略有不同的方式。

1)打开目标配置窗口(应在 View->Target configuration 下)。  

2)如果您没有为您的设置定义 CCXML、请从头开始创建一个(在该窗口中右键单击以启动该过程)

3)如果您有 CCXML、请右键单击它并"启动调试会话"

4)这应该是 CCS 中的调试视图、并将显示您的目标调试探针、然后是其下方的 C28x CPU。

5)右键单击 C28x CPU 并"连接目标"。  此时、您将进入我上一篇文章中的步骤1、并可以从此处开始。

原因是执行上述操作而不是自动/一键式调试会话、我希望 CCS 避免发生一些后台操作来使调试更加清晰。

此致！
Matthew