主题中讨论的其他器件:LAUNCHXL-F2800157、 C2000WARE
您好!
我们正在使用尝试的功能在 LAUNCHXL-F2800157上运行锁步。 您能否提供任何示例、因为 c2000ware 没有相同的示例。
我正在尝试使用 TINA 仿真运算放大器的
LCMCPU1Regs.LCM_CONTROL.bit.CMP1_ERR_FORCE = 1;
但它不会进入 PIE 矢量中配置的 ISR。
参考函数的附加代码:
#include "f28x_project.h"
#include "string.h"
__interrupt void lockstep_ISR(void)
{
LCMCPU1Regs.LCM_STATUS_CLEAR.bit.CMP_FAIL = 1; // clear LCM compare fail flag
LCMCPU1Regs.LCM_STATUS_CLEAR.bit.CMP1_ERR_FORCE_DONE = 1;
LCMCPU1Regs.LCM_STATUS_CLEAR.bit.CMP1_ERR_FORCE_PASS = 1;
LCMCPU1Regs.LCM_STATUS_CLEAR.bit.CMP2_ERR_FORCE_DONE = 1;
LCMCPU1Regs.LCM_STATUS_CLEAR.bit.CMP2_ERR_FORCE_PASS = 1;
GpioDataRegs.GPBTOGGLE.bit.GPIO49 = 1;
}
void lockstep_init()
{
CpuSysRegs.LSEN.bit.Enable = 1; // enable lockstep module
CpuSysRegs.CPUSYSLOCK2.bit.LSEN = 1; // lock lsen register
LCMCPU1Regs.LCM_CONTROL.bit.CMPEN = 1; // enable lockstep redundant module
LCMCPU1Regs.LCM_STATUS_CLEAR.bit.CMP_FAIL = 1; // clear flags
LCMCPU1Regs.LCM_STATUS_CLEAR.bit.CMP1_ERR_FORCE_DONE = 1;
LCMCPU1Regs.LCM_STATUS_CLEAR.bit.CMP1_ERR_FORCE_PASS = 1;
LCMCPU1Regs.LCM_STATUS_CLEAR.bit.CMP2_ERR_FORCE_DONE = 1;
LCMCPU1Regs.LCM_STATUS_CLEAR.bit.CMP2_ERR_FORCE_PASS = 1;
LCMCPU1Regs.LCM_STATUS_CLEAR.bit.STDONE = 1;
LCMCPU1Regs.LCM_STATUS_CLEAR.bit.STPASS = 1;
LCMCPU1Regs.LCM_CONTROL.bit.STEN = 1; // start LCM self test
__asm(" NOP");
while(LCMCPU1Regs.LCM_STATUS.bit.STACTIVE);
if(LCMCPU1Regs.LCM_STATUS.bit.STDONE)
{
if((LCMCPU1Regs.LCM_STATUS.bit.STPASS) == 0)
{
// lcm_self_test fail_function();
}
}
LCMCPU1Regs.LCM_STATUS_CLEAR.bit.CMP_FAIL = 1; // clear flags
LCMCPU1Regs.LCM_STATUS_CLEAR.bit.CMP1_ERR_FORCE_DONE = 1;
LCMCPU1Regs.LCM_STATUS_CLEAR.bit.CMP1_ERR_FORCE_PASS = 1;
LCMCPU1Regs.LCM_STATUS_CLEAR.bit.CMP2_ERR_FORCE_DONE = 1;
LCMCPU1Regs.LCM_STATUS_CLEAR.bit.CMP2_ERR_FORCE_PASS = 1;
LCMCPU1Regs.LCM_STATUS_CLEAR.bit.STDONE = 1;
LCMCPU1Regs.LCM_STATUS_CLEAR.bit.STPASS = 1;
return;
}
void pie_init()
{
NmiIntruptRegs.NMICFG.bit.NMIE = 1; // enable NMI intt
LCMCPU1Regs.LCM_STATUS_CLEAR.bit.CMP_FAIL = 1; // clear LCM compare fail flag
NmiIntruptRegs.NMIFLGCLR.bit.LSCMPERR = 1; // force clear NMI lockstep flag
NmiIntruptRegs.NMIFLGCLR.bit.NMIINT = 1; // force clear NMIINT flag
NmiIntruptRegs.NMIWDPRD = 0xFFFF; // NMI watchdog top value
IER = 0;
IFR = 0;
InitPieCtrl();
InitPieVectTable();
PieVectTable.NMI_INT = &lockstep_ISR;
EINT;
ERTM;
return;
}
int main(void)
{
memcpy(&RamfuncsRunStart, &RamfuncsLoadStart, (size_t)&RamfuncsLoadSize);
InitFlash();
InitSysCtrl();
DINT;
EALLOW;
GpioCtrlRegs.GPBLOCK.bit.GPIO49 = 0; // unlock led pin
GpioCtrlRegs.GPBDIR.bit.GPIO49 = 1; // set as output for led
// GpioDataRegs.GPBTOGGLE.bit.GPIO49 = 1;
lockstep_init();
// GpioDataRegs.GPBTOGGLE.bit.GPIO49 = 1;
pie_init();
EDIS;
while(1)
{
for(uint16_t j = 0; j<=2; j++)
{
for(uint32_t i = 0; i <= 5000000; i++ ); // random delay or processing
}
// GpioDataRegs.GPBTOGGLE.bit.GPIO49 = 1;
LCMCPU1Regs.LCM_CONTROL.bit.CMP1_ERR_FORCE = 1;
// if((LCMCPU1Regs.LCM_STATUS.bit.CMP1_ERR_FORCE_PASS) == 1)
// {
// GpioDataRegs.GPBTOGGLE.bit.GPIO49 = 1;
// }
}
return 0;
}