[参考译文] TMS320F28027：寄存器 COMPHYSTCTL

admin

请注意，本文内容源自机器翻译，可能存在语法或其它翻译错误，仅供参考。如需获取准确内容，请参阅链接中的英语原文或自行翻译。

https://e2e.ti.com/support/microcontrollers/c2000-microcontrollers-group/c2000/f/c2000-microcontrollers-forum/1461813/tms320f28027-register-comphystctl

器件型号：TMS320F28027

工具与软件：

您好！

我想禁用比较器迟滞、但在我的库中没有 COMPHYSTCTL 寄存器的定义

AdcRegs.COMPHYSTCTL.bit.COMP2_HYST_DISABLE = 1;
AdcRegs.COMPHYSTCTL.bit.COMP1_HYST_DISABLE = 1;

我可以将上述代码替换为以下代码吗？

	unsigned short* addr = (unsigned short*) 0x714C;
    *addr |= 0x42;

struct ADC_REGS {
    union  ADCCTL1_REG           ADCCTL1;         // ADC Control 1
    union  ADCCTL2_REG           ADCCTL2;         // ADC Control 2 - not available in Rev. 0 silicon
    Uint16                       rsvd1[2];        // reserved
    union  ADCINT_REG            ADCINTFLG;       // ADC Interrupt Flag
    union  ADCINT_REG            ADCINTFLGCLR;    // ADC Interrupt Flag Clear
    union  ADCINT_REG            ADCINTOVF;       // ADC Interrupt Overflow
    union  ADCINT_REG            ADCINTOVFCLR;    // ADC Interrupt Overflow Clear
    union  INTSEL1N2_REG         INTSEL1N2;       // ADC Interrupt 1 and 2 Selection
    union  INTSEL3N4_REG         INTSEL3N4;       // ADC Interrupt 3 and 4 Selection
    union  INTSEL5N6_REG         INTSEL5N6;       // ADC Interrupt 5 and 6 Selection
    union  INTSEL7N8_REG         INTSEL7N8;       // ADC Interrupt 7 and 8 Selection
    union  INTSEL9N10_REG        INTSEL9N10;      // ADC Interrupt 9 and 10 Selection
    Uint16                       rsvd2[3];        // reserved
    union  SOCPRICTL_REG         SOCPRICTL;       // ADC SOC Priority Control
    Uint16                       rsvd3;           // reserved
    union  ADCSAMPLEMODE_REG     ADCSAMPLEMODE;   // ADC Sampling Mode
    Uint16                       rsvd4;           // reserved
    union  ADCINTSOCSEL1_REG     ADCINTSOCSEL1;   // ADC Interrupt SOC Selection 1
    union  ADCINTSOCSEL2_REG     ADCINTSOCSEL2;   // ADC Interrupt SOC Selection 2
    Uint16                       rsvd5[2];        // reserved
    union  ADCSOC_REG            ADCSOCFLG1;      // ADC SOC Flag 1
    Uint16                       rsvd6;           // reserved
    union  ADCSOC_REG            ADCSOCFRC1;      // ADC SOC Flag Force 1
    Uint16                       rsvd7;           // reserved
    union  ADCSOC_REG            ADCSOCOVF1;      // ADC SOC Overflow 1
    Uint16                       rsvd8;           // reserved
    union  ADCSOC_REG            ADCSOCOVFCLR1;   // ADC SOC Overflow Clear 1
    Uint16                       rsvd9;           // reserved
    union  ADCSOCxCTL_REG        ADCSOC0CTL;      // ADC SOC0 Control
    union  ADCSOCxCTL_REG        ADCSOC1CTL;      // ADC SOC1 Control
    union  ADCSOCxCTL_REG        ADCSOC2CTL;      // ADC SOC2 Control
    union  ADCSOCxCTL_REG        ADCSOC3CTL;      // ADC SOC3 Control
    union  ADCSOCxCTL_REG        ADCSOC4CTL;      // ADC SOC4 Control
    union  ADCSOCxCTL_REG        ADCSOC5CTL;      // ADC SOC5 Control
    union  ADCSOCxCTL_REG        ADCSOC6CTL;      // ADC SOC6 Control
    union  ADCSOCxCTL_REG        ADCSOC7CTL;      // ADC SOC7 Control
    union  ADCSOCxCTL_REG        ADCSOC8CTL;      // ADC SOC8 Control
    union  ADCSOCxCTL_REG        ADCSOC9CTL;      // ADC SOC9 Control
    union  ADCSOCxCTL_REG        ADCSOC10CTL;     // ADC SOC10 Control
    union  ADCSOCxCTL_REG        ADCSOC11CTL;     // ADC SOC11 Control
    union  ADCSOCxCTL_REG        ADCSOC12CTL;     // ADC SOC12 Control
    union  ADCSOCxCTL_REG        ADCSOC13CTL;     // ADC SOC13 Control
    union  ADCSOCxCTL_REG        ADCSOC14CTL;     // ADC SOC14 Control
    union  ADCSOCxCTL_REG        ADCSOC15CTL;     // ADC SOC15 Control
    Uint16                       rsvd10 [16];     // reserved
    union  ADCREFTRIM_REG        ADCREFTRIM;      // Reference Trim Register
    union  ADCOFFTRIM_REG        ADCOFFTRIM;      // Offset Trim Register
    Uint16                       rsvd11 [14];     // reserved
};

10 个月前