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https://e2e.ti.com/support/data-converters-group/data-converters/f/data-converters-forum/804569/ads1278-sclk-maximum-frequency
根据数据表中 SPI 格式时序规范表中显示的最小 t_SCLK、 ADS1278 SCLK 频率似乎被限制在主时钟频率。
这是硬性限制、还是只是为了获得最佳性能而推荐的限制? 如果 f_SCLK 快于 f_CLK、会发生什么情况?