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https://e2e.ti.com/support/logic-group/logic/f/logic-forum/753893/sn74lvc1g17-might-it-have-power-leakage-risk-on-vcc-or-pin-y-output-while-pin-a-input
大家好、
当引脚 A 输入时、Vcc 或引脚 Y (输出)上可能存在电源泄漏风险？
谢谢
您好！
"漏电风险"是什么意思？ 您是否正在尝试确定输入是否可以大于电源/输出电压？
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