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器件型号：UCD3138 工具/软件：
我真诚地希望您可以帮助我解决以下问题、我在配置 DPWMEV1时无法正确配置它。 将不同的值写入代码并从存储器中读取。
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工具/软件：
我真诚地希望您可以帮助我解决以下问题、我在配置 DPWMEV1时无法正确配置它。 将不同的值写入代码并从存储器中读取。、
首先、感谢您的回复、我想在闭环控制模式下使用正常模式。 我看到 DPWM1B 的上升沿由 DPWMEV3-DPWMEV2控制、因此我想将 DPWMEV2设置为0。 这种控制是否合理？ 谢谢你。
您好：
根据您的代码、我假设您使用 UCD3138PFCEVM-026 和 UCD3138FW-PFC。 PFC 示例代码配置中的 UCD3138 多模式 、非正常模式。 在多模式下、DPWMEV2和 DPWMEV4在固件中不会被设置、DPWM 下降沿由滤波器占空比决定。 UCD31xx 技术参考手册 的第36页展示了多模式的方框图。
例如、您可以转至 Insert →Code 并选择语言、将代码复制到 E2E 帖子中。 请参阅下面 PFC 固件中的示例 DPWM1初始化代码。
void init_dpwm1(void) // DPWM1B is used to drive 1st phase
{
Dpwm1Regs.DPWMCTRL0.bit.PWM_EN = 0; //disable everything
Dpwm1Regs.DPWMCTRL1.bit.GPIO_A_EN = 1; //turn off DPWM1A for now
Dpwm1Regs.DPWMCTRL1.bit.GPIO_B_EN = 1; //turn off DPWM1B for now
// Enable Current Limit and Set min duty cycle to verify.
Dpwm1Regs.DPWMCTRL0.bit.CBC_PWM_AB_EN = 1; // Enable cycle by cycle current limit.
Dpwm1Regs.DPWMCTRL0.bit.BLANK_B_EN = 1; // Enable blanking so we can see a min pulse for curr lim
Dpwm1Regs.DPWMBLKBBEG.all = 0x0000;
Dpwm1Regs.DPWMBLKBEND.all = 0x0500;
Dpwm1Regs.DPWMFLTCTRL.bit.B_MAX_COUNT = 2;
Dpwm1Regs.DPWMFLTCTRL.bit.ALL_FAULT_EN = 1; //enable this for OVP
Dpwm1Regs.DPWMCTRL2.bit.SAMPLE_TRIG_1_EN = 1; //enable sample trigger1
#if(PFC_TYPE == INTERLEAVED)//if this is interleaved PFC
Dpwm1Regs.DPWMCTRL0.bit.PWM_MODE = 3; //triangular mode
// Dpwm1Regs.DPWMCTRL2.bit.SAMPLE_TRIG1_OVERSAMPLE = 0; //NO oversampling.
Dpwm1Regs.DPWMCTRL1.bit.EVENT_UP_SEL = 0; //update right away
#elif(PFC_TYPE == BRIDGELESS)//if this is bridgeless PFC
Dpwm1Regs.DPWMCTRL0.bit.PWM_MODE = 3; //triangular mode
// Dpwm1Regs.DPWMCTRL2.bit.SAMPLE_TRIG1_OVERSAMPLE = 0; //NO oversampling.
Dpwm1Regs.DPWMCTRL1.bit.EVENT_UP_SEL = 0; //update right away
#else //single phase
#if ((UCD3138A==1)||(UCD3138064A==1)||(UCD3138A64A==1)||(UCD3138128A==1)||(UCD3138A64==1)||(UCD3138128==1))
Dpwm1Regs.DPWMEV1.all = 132*4; //aviod 132ns events update window
Dpwm1Regs.DPWMEV3.all = 132*4; //aviod 132ns events update window
#else //non A version
Dpwm1Regs.DPWMEV1.all = 290;
Dpwm1Regs.DPWMEV3.all = 290;//aviod 72ns events update window
#endif //((UCD3138A==1)||(UCD3138064A==1)||(UCD3138A64A==1)||(UCD3138128A==1))
Dpwm1Regs.DPWMCTRL0.bit.PWM_MODE = 2; //multi mode
// Dpwm1Regs.DPWMCTRL2.bit.SAMPLE_TRIG1_OVERSAMPLE = 3; //8X oversampling.
Dpwm1Regs.DPWMCTRL1.bit.EVENT_UP_SEL = 1; //update at end of period
#endif
Dpwm1Regs.DPWMCTRL0.bit.CLA_EN = 1;
Dpwm1Regs.DPWMCTRL0.bit.PWM_EN = 1; //enable OK here, because nothing will happen until DPWM and front end are globally enabled
}
此致、
Jonathan Wong
您好 Liu、
您仍需要 在出现 EVENT2和 EVENT3的周期内设置一个值。 UCD3138FW-HSFB、 UCD3138FW-PSFB 和 UCD3138FW-BIDI 都使用正常模式。 下面是 UCD3138FW-BIDI 的 DPWM0初始化、它基于 TIDA-00653 降压/升压设计。
#define EVENT_2 ( DPWM_PERIOD >>2)
#define EVENT_3 ( DPWM_PERIOD >>2 )
inline init_dpwm0()
{
Dpwm0Regs.DPWMCTRL0.bit.PWM_EN = 0; //disable locally for init
Dpwm0Regs.DPWMCTRL0.bit.CLA_EN = 1; //default is 1 - use cla
Dpwm0Regs.DPWMCTRL0.bit.PWM_MODE = 0; //normal mode
Dpwm0Regs.DPWMPRD.all = DPWM_PERIOD; //use .all for all values, make sure scaling matches.
Dpwm0Regs.DPWMEV1.all = (DEAD_TIME_1)+10; //Put event 1 at start of period
Dpwm0Regs.DPWMEV2.all =EVENT_2; //1/4 of period - divide is OK because it's all constants.
Dpwm0Regs.DPWMEV3.all = EVENT_3+(DEAD_TIME_2); //1/2 of period
Dpwm0Regs.DPWMEV4.all = 10;
Dpwm0Regs.DPWMSAMPTRIG1.all =200 ;
Dpwm0Regs.DPWMCTRL2.bit.SAMPLE_TRIG_1_EN = 1; //enable 1 sample trigger
Dpwm0Regs.DPWMCTRL1.bit.EVENT_UP_SEL = 1; //update at end of period
Dpwm0Regs.DPWMPHASETRIG.all=(DPWM_PERIOD)/4;
Dpwm0Regs.DPWMCTRL0.bit.MSYNC_SLAVE_EN=0;
#ifdef HARD_SWITCHING
Dpwm0Regs.DPWMCTRL0.bit.MIN_DUTY_MODE=0;
#else
Dpwm0Regs.DPWMCTRL0.bit.MIN_DUTY_MODE=2;
#endif
//Dpwm0Regs.DPWMINT.bit.PRD_INT_EN=1;
Dpwm0Regs.DPWMINT.bit.PRD_INT_SCALE=5;
}
此致、
Jonathan Wong