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https://e2e.ti.com/support/power-management-group/power-management/f/power-management-forum/968588/tps59641-definition-of-vclk-clock
尊敬的团队：
请告诉我 VCLK 时钟的定义。 1.频率 2. 占空比/上升时序/下降时序/抖动
此致、 PAN-M
您好、Pan-M、
VCLK 用于来自 CPU 的 SVID 时钟。 频率和占空比可能因 CPU SKU 而异。 标称时钟频率约为25MHz 和40%- 60%占空比。
谢谢
Chasel
