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https://e2e.ti.com/support/power-management-group/power-management/f/power-management-forum/1256878/ucc21750-logic-low-threshold-level-of-rdy-flt
你好
FLT 和 RDY 引脚的逻辑低电平阈值电压是多少？ 它是否与 数据表中给出的 VODL (开漏低输出电压)相同？
谢谢。此
您好、Anoop、
是的、正确、这是5mA IODON 将 FET 拉至低电平、触发 nFLT 并将 RDY 引脚拉至低电平所需的最小电压。
此致！
普拉蒂克
