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[参考译文] AM623:调试 U-boot 启动界面时遇到一些困难

Guru**** 2393725 points
Other Parts Discussed in Thread: AM625

请注意,本文内容源自机器翻译,可能存在语法或其它翻译错误,仅供参考。如需获取准确内容,请参阅链接中的英语原文或自行翻译。

https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1483459/am623-some-difficulties-encountered-in-debugging-u-boot-splash-screen

器件型号:AM623
主题中讨论的其他器件:AM625

工具与软件:

您好、TI

我最近一直在调试 U-boot 启动界面功能、我想回答两个问题。


1.背景:我们的定制开发板有两个型号,使用 RGB888接口和单个 LVDS 接口视频。 两个定制电路板都使用 EMMC UDA 原始模式引导。


2.遇到的问题:
(1)当我在 uboot 命令行上执行'bmp display $loadaddr m m'命令时、会报告以下错误。 我在 e2e 上看到了一些帖子、似乎 TI 仅在双 LVDS 接口上进行了验证?

=> ls mmc 0 /boot
<DIR>       4096 .
<DIR>       4096 ..
<DIR>       4096 dtb
        20212224 Image
           12285 ti_logo_414x97_32bpp.bmp.gz
=> ext4load mmc 0 $loadaddr /boot/ti_logo_414x97_32bpp.bmp.gz
This will not be a case any time
12285 bytes read in 18 ms (666 KiB/s)
=> bmp display $loadaddr m m
single-pinctrl pinctrl@f4000: configuring pins for main-dss0-pins-default
single-pinctrl pinctrl@f4000:   reg/val 0x00000000000f4100/0x00010000
single-pinctrl pinctrl@f4000:   reg/val 0x00000000000f40f8/0x00010000
single-pinctrl pinctrl@f4000:   reg/val 0x00000000000f4104/0x00010000
single-pinctrl pinctrl@f4000:   reg/val 0x00000000000f40fc/0x00010000
single-pinctrl pinctrl@f4000:   reg/val 0x00000000000f40b8/0x00010000
single-pinctrl pinctrl@f4000:   reg/val 0x00000000000f40bc/0x00010000
single-pinctrl pinctrl@f4000:   reg/val 0x00000000000f40c0/0x00010000
single-pinctrl pinctrl@f4000:   reg/val 0x00000000000f40c4/0x00010000
single-pinctrl pinctrl@f4000:   reg/val 0x00000000000f40c8/0x00010000
single-pinctrl pinctrl@f4000:   reg/val 0x00000000000f40cc/0x00010000
single-pinctrl pinctrl@f4000:   reg/val 0x00000000000f40d0/0x00010000
single-pinctrl pinctrl@f4000:   reg/val 0x00000000000f40d4/0x00010000
single-pinctrl pinctrl@f4000:   reg/val 0x00000000000f40d8/0x00010000
single-pinctrl pinctrl@f4000:   reg/val 0x00000000000f40dc/0x00010000
single-pinctrl pinctrl@f4000:   reg/val 0x00000000000f40e0/0x00010000
single-pinctrl pinctrl@f4000:   reg/val 0x00000000000f40e4/0x00010000
single-pinctrl pinctrl@f4000:   reg/val 0x00000000000f40e8/0x00010000
single-pinctrl pinctrl@f4000:   reg/val 0x00000000000f40ec/0x00010000
single-pinctrl pinctrl@f4000:   reg/val 0x00000000000f40f0/0x00010000
single-pinctrl pinctrl@f4000:   reg/val 0x00000000000f40f4/0x00010000
single-pinctrl pinctrl@f4000:   reg/val 0x00000000000f405c/0x00010001
single-pinctrl pinctrl@f4000:   reg/val 0x00000000000f4060/0x00010001
single-pinctrl pinctrl@f4000:   reg/val 0x00000000000f4064/0x00010001
single-pinctrl pinctrl@f4000:   reg/val 0x00000000000f4068/0x00010001
single-pinctrl pinctrl@f4000:   reg/val 0x00000000000f406c/0x00010001
single-pinctrl pinctrl@f4000:   reg/val 0x00000000000f4070/0x00010001
single-pinctrl pinctrl@f4000:   reg/val 0x00000000000f4074/0x00010001
single-pinctrl pinctrl@f4000:   reg/val 0x00000000000f4078/0x00010001
ti_ehrpwm pwm@23010000: regs=0x23010000
single-pinctrl pinctrl@f4000: configuring pins for main-epwm1-a-pins-default
single-pinctrl pinctrl@f4000:   reg/val 0x00000000000f419c/0x00010006
tidss_drv dss@30200000: vidl1: bufsize 2560, buf_threshold 2559/1280, mflag threshold 1706/853 preload 1280
tidss_drv dss@30200000: vid1: bufsize 2560, buf_threshold 2559/1280, mflag threshold 1706/853 preload 1280
tidss_drv dss@30200000: vp1: new rate 51923076 Hz (requested 51912000 Hz)
tidss_drv dss@30200000: dss_vp_set_gamma: hw_videoport 1, lut len 0, hw len 256
tidss_drv dss@30200000: dss_vp_write_gamma_table: hw_videoport 1
tidss_drv dss@30200000: DSS fclk 250000000 Hz
"Synchronous Abort" handler, esr 0x96000004
elr: 000000008086a114 lr : 000000008086ce14 (reloc)
elr: 000000009b64e114 lr : 000000009b650e14
x0 : 0000000000000000 x1 : 0001010100000000
x2 : 000000000000000a x3 : 0000000002800000
x4 : 0000000002800000 x5 : 00000000995b4529
x6 : 0000000000000030 x7 : 00000000995b49b0
x8 : 000000000000000c x9 : 0000000000000008
x10: 00000000ffffffe0 x11: 0000000000000006
x12: 000000000001869f x13: 0000000000000000
x14: 0000000000000000 x15: 0000000000000000
x16: 000000009b64bbb0 x17: 00000000996d8f00
x18: 00000000995c4d80 x19: 000000009b6a7b20
x20: 0000000000000000 x21: 00000000995c7f50
x22: 000000009b6c8a71 x23: 000000009b6c75c0
x24: 00000000995baeb8 x25: 0000000000000355
x26: 00000000995cd360 x27: 0000000000000500
x28: 0000000000000002 x29: 00000000995b49c0

Code: d65f03c0 128002a0 17fffffa f9400001 (f9403421)
Resetting CPU ...

resetting ...

(__LW_AT__2)由于我们的启动模式为 EMMC UDA 原始模式、因此我已修改"board/ti/am62x/evm"。 C'。 如下所示、我更改了"的值。 flags 中的所有其他"标识和特性"、将结构数组第二项中的"声明"从"SPLASH_STORAGE-RAW" FS 更改为"SPLASH_STORAGE-RAW"。 我已经编写了命令'ext4load MMC 0 $loadaddr/boot/tilog_414x97_32bpp。 BMP。 GZ"写入 uboot 的环境变量中、但根据 uboot 启动日志、在执行 uboot 命令之前、uboot 已报告错误"错误的 gzipped 数据在给定地址没有有效的 bmp 文件"。 TI 是否验证了 EMMC 的"SPLASH_STORAGE-RAW"? 如果是、如何加载 ti-logo_414x97_32bpp.bbm.gz?

static struct splash_location default_splash_locations[] = {
	{
		.name = "sf",
		.storage = SPLASH_STORAGE_SF,
		.flags = SPLASH_STORAGE_RAW,
		.offset = 0x700000,
	},
	{
		.name		= "mmc",
		.storage	= SPLASH_STORAGE_MMC,
		.flags		= SPLASH_STORAGE_RAW,
		.devpart	= "0:1",
	},
};

U-Boot SPL 2023.04-00007-g639d43ac-dirty (Mar 05 2025 - 17:55:17 +0800)
SYSFW ABI: 3.1 (firmware rev 0x0009 '9.2.8--v09.02.08 (Kool Koala)')
SPL initial stack usage: 13408 bytes
Trying to boot from MMC1
Authentication passed
Authentication passed
Authentication passed
Loading Environment from nowhere... OK
init_env from device 9 not supported!
Authentication passed
Authentication passed
Starting ATF on ARM64 core...

NOTICE:  BL31: v2.10.0(release):v2.10.0-367-g00f1ec6b87-dirty
NOTICE:  BL31: Built : 16:09:05, Feb  9 2024

U-Boot SPL 2023.04-00007-g639d43ac-dirty (Mar 06 2025 - 17:04:44 +0800)
SYSFW ABI: 3.1 (firmware rev 0x0009 '9.2.8--v09.02.08 (Kool Koala)')
SPL initial stack usage: 1856 bytes
Error: Bad gzipped data
There is no valid bmp file at the given address
Trying to boot from MMC1
Warning: Did not detect image signing certificate. Skipping authentication to prevent boot failure. This will fail on Security Enforcing(HS-SE) devices
Warning: Did not detect image signing certificate. Skipping authentication to prevent boot failure. This will fail on Security Enforcing(HS-SE) devices


U-Boot 2023.04-00007-g639d43ac-dirty (Mar 06 2025 - 17:50:29 +0800)

SoC:   AM62X SR1.0 HS-FS
Model: Texas Instruments AM62x HMI
DRAM:  512 MiB
Core:  64 devices, 34 uclasses, devicetree: separate
MMC:   mmc@fa10000: 0
Loading Environment from nowhere... OK
Error: Bad gzipped data
There is no valid bmp file at the given address
In:    serial
Out:   serial
Err:   serial
Net:   eth0: ethernet@8000000port@1
Hit any key to stop autoboot:  0
switch to partitions #0, OK
mmc0(part 0) is current device
...................env test1...........................
This will not be a case any time
12285 bytes read in 18 ms (666 KiB/s)
SD/MMC found on device 0
Failed to load 'boot.scr'
Can't set block device
echo ...................env test2...........................
This will not be a case any time
12285 bytes read in 18 ms (666 KiB/s)
## Error: "main_cpsw0_qsgmii_phyinit" not defined
This will not be a case any time
20212224 bytes read in 807 ms (23.9 MiB/s)
This will not be a case any time
57631 bytes read in 21 ms (2.6 MiB/s)
Working FDT set to 88000000
## Flattened Device Tree blob at 88000000
   Booting using the fdt blob at 0x88000000
Working FDT set to 88000000

  • 请注意,本文内容源自机器翻译,可能存在语法或其它翻译错误,仅供参考。如需获取准确内容,请参阅链接中的英语原文或自行翻译。

    可以有人帮我看一下吗?

  • 请注意,本文内容源自机器翻译,可能存在语法或其它翻译错误,仅供参考。如需获取准确内容,请参阅链接中的英语原文或自行翻译。

    您好!

    我们尚未在 AM625的 Uboot 启动界面中测试单链路 LVDS 和 RGB888。 团队正在调查上述请求并制定解决方案。

    此致、
    Krunal

  • 请注意,本文内容源自机器翻译,可能存在语法或其它翻译错误,仅供参考。如需获取准确内容,请参阅链接中的英语原文或自行翻译。

    您好!

    这项要求何时会得到满足? 我们的项目进度一直在这里。

  • 请注意,本文内容源自机器翻译,可能存在语法或其它翻译错误,仅供参考。如需获取准确内容,请参阅链接中的英语原文或自行翻译。

    您好!

    将与我们的开发人员进行核实并联系您。

    此致、
    Krunal

  • 请注意,本文内容源自机器翻译,可能存在语法或其它翻译错误,仅供参考。如需获取准确内容,请参阅链接中的英语原文或自行翻译。

    您好!

    我们的流水线中正在启用 RGB888、但我们尚未提交特定 时间线。

  • 请注意,本文内容源自机器翻译,可能存在语法或其它翻译错误,仅供参考。如需获取准确内容,请参阅链接中的英语原文或自行翻译。

    您好!
    我们希望 TI 专家能够尽快在 Uboot 级实现 RGB888和单通道 LVDS 显示功能。 这也是许多其他用户的要求。 谢谢你。