[参考译文] J721EXSOMXEVM：勘误表 i2086 TI XIO2001单功能 PCI Express 至 PCI 转换桥接器问题

https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1523570/j721exsomxevm-errata-i2086-issue-with-ti-xio2001-single-function-pci-express-to-pci-translation-bridge

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我基于 J721e SoC 的客户电路板使用包含 德州仪器(TI) XIO2001 PCI Express 转 PCI 桥接器[104C：8240]的 PCIe 器件。
但是、正如  关于 PCIe 开关和多功能设备勘误表 i2086的常见问题解答中所报告的、PCI 枚举期间内核崩溃：

[    0.367547] j721e-pcie-host 2910000.pcie: host bridge /bus@100000/pcie@2910000 ranges:
[    0.367563] j721e-pcie-host 2910000.pcie: Parsing ranges property...
[    0.367575] j721e-pcie-host 2910000.pcie:       IO 0x0018001000..0x0018010fff -> 0x0018001000
[    0.367588] j721e-pcie-host 2910000.pcie:      MEM 0x0018011000..0x001fffffff -> 0x0018011000
[    0.367593] j721e-pcie-host 2910000.pcie: Parsing dma-ranges property...
[    0.367599] j721e-pcie-host 2910000.pcie:   IB MEM 0x0000000000..0xffffffffffff -> 0x0000000000
[    0.469891] j721e-pcie-host 2910000.pcie: Link up
[    0.493902] j721e-pcie-host 2910000.pcie: LINK DOWN!
[    0.594001] j721e-pcie-host 2910000.pcie: Link up
[    0.594091] j721e-pcie-host 2910000.pcie: PCI host bridge to bus 0000:00
[    0.594096] pci_bus 0000:00: root bus resource [bus 00-ff]
[    0.594101] pci_bus 0000:00: root bus resource [io  0x0000-0xffff] (bus address [0x18001000-0x18010fff])
[    0.594104] pci_bus 0000:00: root bus resource [mem 0x18011000-0x1fffffff]
[    0.594108] pci_bus 0000:00: scanning bus
[    0.594134] pci 0000:00:00.0: [104c:b00d] type 01 class 0x060400
[    0.594138] pci_bus 0000:00: 2-byte config write to 0000:00:00.0 offset 0x4 may corrupt adjacent RW1C bits
[    0.594210] pci 0000:00:00.0: supports D1
[    0.594213] pci 0000:00:00.0: PME# supported from D0 D1 D3hot
[    0.594218] pci 0000:00:00.0: PME# disabled
[    0.594358] pci 0000:00:00.0: vgaarb: pci_notify
[    0.595863] pci_bus 0000:00: fixups for bus
[    0.595866] pci 0000:00:00.0: scanning [bus 00-00] behind bridge, pass 0
[    0.595870] pci 0000:00:00.0: bridge configuration invalid ([bus 00-00]), reconfiguring
[    0.595876] pci 0000:00:00.0: scanning [bus 00-00] behind bridge, pass 1
[    0.595923] pci_bus 0000:01: scanning bus
[    0.595972] pci 0000:01:00.0: [104c:8240] type 01 class 0x060400
[    0.596216] pci 0000:01:00.0: supports D1 D2
[    0.596372] pci 0000:01:00.0: vgaarb: pci_notify
[    0.620418] j721e-pcie-host 2910000.pcie: LINK DOWN!
[    1.766328] pci_bus 0000:01: fixups for bus
[    1.766335] pci 0000:01:00.0: scanning [bus 00-00] behind bridge, pass 0
[    1.766339] pci 0000:01:00.0: bridge configuration invalid ([bus 00-00]), reconfiguring
[    1.766357] pci 0000:01:00.0: scanning [bus 00-00] behind bridge, pass 1
[    1.766472] pci_bus 0000:02: extended config space not accessible
[    1.766504] pci_bus 0000:02: scanning bus
[    1.766526] pci 0000:02:00.0: [15cf:0000] type 00 class 0xff0000
[    1.766567] pci 0000:02:00.0: reg 0x10: [mem 0x00000000-0x0000ffff]
[    1.766761] pci 0000:02:00.0: vgaarb: pci_notify
[    1.766787] SError Interrupt on CPU1, code 0x00000000bf000000 -- SError
[    1.766792] CPU: 1 PID: 9 Comm: kworker/u4:0 Not tainted 6.1.119-rt45 #78
[    1.766796] Hardware name: BeagleBoard.org BeagleBone AI-64 (DT)

由于此问题特定于 J721e SoC、因此我可以使用 TI SK-TDA4VM 和 BeagleBone-AI64板重现该问题。

注意：与常见问题解答中的日志不同、我在每个电路板上都注意到链路接通->下->上->下序列：

[    0.469891] j721e-pcie-host 2910000.pcie: Link up
[    0.493902] j721e-pcie-host 2910000.pcie: LINK DOWN!
[    0.594001] j721e-pcie-host 2910000.pcie: Link up
...
[    0.620418] j721e-pcie-host 2910000.pcie: LINK DOWN!

PCIe 设备似乎不支持 PCIe ARI 转发功能(因此常见问题解答解决方法1不适用)。

 常见问题解答变通办法#2似乎不适用于我的用例、XIO2001是一个单功能 PCI Express 至 PCI 转换桥接器(我不确定如何创建5个 虚拟函数)

因此、唯一剩下的权变措施3是修补内核以忽略系统中止并恢复正常运行。

实际上、内核在 PCI 枚举期间不再崩溃、但未检测到设备(由于链路断开？)
我必须手动重新扫描 PCIe 总线以检测 CIFX PCI/PCIe [15CF：0000]

# lspci 
00:00.0 PCI bridge: Texas Instruments Device b00d
01:00.0 PCI bridge: Texas Instruments XIO2001 PCI Express-to-PCI Bridge
 
# echo 1 > /sys/class/pci_bus/0000:00/rescan
[   37.644278] pci 0000:01:00.0: bridge configuration invalid ([bus 00-00]), reconfiguring
[   37.644410] pci_bus 0000:02: extended config space not accessible
[   37.646080] pci_bus 0000:02: busn_res: can not insert [bus 02-01] under [bus 01] (conflicts with (null) [bus 01])
[   37.646119] pci 0000:02:00.0: [15cf:0000] type 00 class 0xff0000 conventional PCI endpoint
[   37.646243] pci 0000:02:00.0: BAR 0 [mem 0x00000000-0x0000ffff]
[   37.651341] pci_bus 0000:02: busn_res: [bus 02-01] end is updated to 02
[   37.651347] pci_bus 0000:02: busn_res: can not insert [bus 02] under [bus 01] (conflicts with (null) [bus 01])
[   37.651356] pci 0000:01:00.0: devices behind bridge are unusable because [bus 02] cannot be assigned for them
[   37.651369] pcieport 0000:00:00.0: bridge has subordinate 01 but max busn 02
[   37.651402] pcieport 0000:00:00.0: bridge window [mem 0x4100200000-0x41002fffff]: assigned
[   37.651407] pci 0000:01:00.0: bridge window [mem 0x4100200000-0x41002fffff]: assigned
[   37.651411] pci 0000:02:00.0: BAR 0 [mem 0x4100200000-0x410020ffff]: assigned
[   37.651422] pci 0000:01:00.0: PCI bridge to [bus 02]
[   37.651651] pci 0000:01:00.0:   bridge window [mem 0x4100200000-0x41002fffff]
 
# lspci 
00:00.0 PCI bridge: Texas Instruments Device b00d
01:00.0 PCI bridge: Texas Instruments XIO2001 PCI Express-to-PCI Bridge
02:00.0 Unassigned class [ff00]: Hilscher Gesellschaft für Systemautomation mbH CIFX PCI/PCIe

我在 SK-TDA4VM 和 BeagleboneAI64上使用了几个 Yocto kirkstone 的内核版本 TI 6.1、scarthgap 的 TI 6.12和 vanilla 6.15+内核(主器件)。

解决此问题的进展是否在上游？

此致、
罗曼语