Other Parts Discussed in Thread: TDA4VM
器件型号: TDA4VM-Q1
Thread: TDA4VM 中讨论的其他器件
您好:
这是上一篇文章的后续文章[1]。
我将在定制电路板上使用 J721e/TDA4VM SoC、当时 MCU_CPSW 接口连接到 ksz9896 外部开关。
在我们确定 CPSW 和 KSZ 驱动器都增加了 2ns 的 RGMII 延迟之前、我们在 iperf 测试中遇到了多个问题。
TI 不会在没有 TX 延迟的情况下测试 CPSW 器件、但我们可以从器件树中自定义 ksz 延迟。 因此、修复方法是禁用(设置为 0)“rx-internal-delay-ps"。“。
以下是我们的器件树片段(内核 6.1.y):
/* mcu domain */
&mcu_cpsw {
status = "okay";
[...]
};
/* mcu domain */
&davinci_mdio {
status = "disabled";
/* KSZ9896C */
/* NO mdio link since we are using the SPI interface! */
};
/* mcu domain */
&cpsw_port1 {
status = "okay";
/* The PCB does not add RGMII rx/tx delays via extra long data/clock
* traces, so 'rgmii-id' should be used.
* When rgmii-id is used, TI fixup to rgmii-rxid:
* dmesg: "am65-cpsw-nuss eth0: configuring for fixed/rgmii-rxid link mode"
* See: lore.kernel.org/.../54d6cd05-65ef-4e1d-8041-3e4a2c50b443@ti.com
*/
phy-mode = "rgmii-id";
fixed-link {
speed = <1000>;
full-duplex;
};
};
&mcu_spi0 {
status = "okay";
/* switch Ethernet */
switch@0 {
[...]
port@5 {
reg = <5>;
ethernet = <&mcu_cpsw>;
phy-mode = "rgmii-id";
/* ksz_parse_rgmii_delay() set tx_delay to 2 nsec by default
* We explicitely set the default delay here.
*/
tx-internal-delay-ps = <2000>;
/* The CPSW will already put a 2 nsec delay between clock and data,
* disable the 2 nsec delay added by ksz_parse_rgmii_delay().
*/
rx-internal-delay-ps = <0>;
fixed-link {
speed = <1000>;
full-duplex;
};
};
};
};
[1] https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1428274/sk-am64b-ksz9477-switch-not-working-with-cpsw-rgmii
[2] https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/tree/drivers/net/dsa/microchip/ksz_common.c?h=v6.1.158#n2857
此致、
罗曼语