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器件型号： TDA4VH-Q1
Thread 中讨论的其他器件： TDA4VH
你（们）好
在 SDK 9.2 中、串行器/解串器 2 上的两个 USXGMII 和两个 SGMII 接口不能同时使用。
我正在使用以下设备树：
&main_cpsw0 {
status = "okay";
pinctrl-names = "default";
};
&main_cpsw0_port1 {
status = "okay"; //"okay"; //"okay";
phy-mode = "usxgmii";
mac-address = [00 00 00 00 00 00];
phys = <&cpsw0_phy_gmii_sel 1>, <&serdes2_usxgmii12_link>;
phy-names = "mac", "serdes";
fixed-link {
speed = <10000>;
full-duplex;
};
};
&main_cpsw0_port2 {
status = "okay";
phy-mode = "usxgmii";
mac-address = [00 00 00 00 00 00];
phys = <&cpsw0_phy_gmii_sel 2>, <&serdes2_usxgmii12_link>;
phy-names = "mac", "serdes";
fixed-link {
speed = <10000>;
full-duplex;
};
};
&main_cpsw0_port5 {
status = "okay";// "disabled";//
phy-mode = "sgmii";
mac-address = [00 00 00 00 00 00];
phys = <&cpsw0_phy_gmii_sel 5>, <&serdes2_sgmii56_link>;
phy-names = "mac", "serdes";
fixed-link {
speed = <1000>;
full-duplex;
};
};
&main_cpsw0_port6 {
status = "okay";
phy-mode = "sgmii";
mac-address = [00 00 00 00 00 00];
phys = <&cpsw0_phy_gmii_sel 6>, <&serdes2_sgmii56_link>;
phy-names = "mac", "serdes";
fixed-link {
speed = <1000>;
full-duplex;
};
};
&serdes_wiz2 {
status = "okay";
assigned-clock-parents = <&k3_clks 406 10>;
};
&serdes2 {
status = "okay";
#address-cells = <1>;
#size-cells = <0>;
assigned-clock-parents = <&k3_clks 406 5>,
<&k3_clks 406 6>,
<&k3_clks 406 6>;
serdes2_usxgmii12_link: phy@2 {
reg = <2>;
cdns,num-lanes = <2>;
#phy-cells = <0>;
cdns,phy-type = <PHY_TYPE_USXGMII>;
resets = <&serdes_wiz2 3>, <&serdes_wiz2 4>;
};
serdes2_sgmii56_link: phy@1 {
reg = <1>;
cdns,num-lanes = <2>;
#phy-cells = <0>;
cdns,phy-type = <PHY_TYPE_SGMII>;
resets = <&serdes_wiz2 1>, <&serdes_wiz2 2>;
};
};
&serdes_ln_ctrl {
idle-states =
<J784S4_SERDES0_LANE0_PCIE1_LANE0>, <J784S4_SERDES0_LANE1_IP1_UNUSED>,
<J784S4_SERDES0_LANE2_PCIE3_LANE0>, <J784S4_SERDES0_LANE3_IP4_UNUSED>,
<J784S4_SERDES1_LANE0_PCIE0_LANE0>, <J784S4_SERDES1_LANE1_QSGMII_LANE4>,
<J784S4_SERDES1_LANE2_PCIE2_LANE0>, <J784S4_SERDES1_LANE3_IP4_UNUSED>,
<J784S4_SERDES2_LANE0_QSGMII_LANE5>, <J784S4_SERDES2_LANE1_QSGMII_LANE6>,
<J784S4_SERDES2_LANE2_QSGMII_LANE1>, <J784S4_SERDES2_LANE3_QSGMII_LANE2>,
<J784S4_SERDES4_LANE0_IP3_UNUSED>, <J784S4_SERDES4_LANE1_IP3_UNUSED>,
<J784S4_SERDES4_LANE2_QSGMII_LANE7>, <J784S4_SERDES4_LANE3_QSGMII_LANE8>;
};日志：
CDN-torrent-phy 5020000.serdes:等待 CMN 就绪超时
PHY phy-5020000.serdes.14: phy 加电失败-->–110
am65-cpsw-nuss：c000000.ethernet 探测失败、错误为–110
USXGMII 在专门启用时正常工作。 这同样适用于单独启用时的 SGMII。
USXGMII 在以下设备树中正常工作。
&main_cpsw0 {
status = "okay";
pinctrl-names = "default";
};
&main_cpsw0_port1 {
status = "okay"; //"okay"; //"okay";
phy-mode = "usxgmii";
mac-address = [00 00 00 00 00 00];
phys = <&cpsw0_phy_gmii_sel 1>, <&serdes2_usxgmii12_link>;
phy-names = "mac", "serdes";
fixed-link {
speed = <10000>;
full-duplex;
};
};
&main_cpsw0_port2 {
status = "okay";
phy-mode = "usxgmii";
mac-address = [00 00 00 00 00 00];
phys = <&cpsw0_phy_gmii_sel 2>, <&serdes2_usxgmii12_link>;
phy-names = "mac", "serdes";
fixed-link {
speed = <10000>;
full-duplex;
};
};
&serdes_wiz2 {
status = "okay";
assigned-clock-parents = <&k3_clks 406 10>;
};
&serdes2 {
status = "okay";
#address-cells = <1>;
#size-cells = <0>;
assigned-clock-parents = <&k3_clks 406 5>,
<&k3_clks 406 6>,
<&k3_clks 406 6>;
serdes2_usxgmii12_link: phy@2 {
reg = <2>;
cdns,num-lanes = <2>;
#phy-cells = <0>;
cdns,phy-type = <PHY_TYPE_USXGMII>;
resets = <&serdes_wiz2 3>, <&serdes_wiz2 4>;
};
};
&serdes_ln_ctrl {
idle-states =
<J784S4_SERDES0_LANE0_PCIE1_LANE0>, <J784S4_SERDES0_LANE1_IP1_UNUSED>,
<J784S4_SERDES0_LANE2_PCIE3_LANE0>, <J784S4_SERDES0_LANE3_IP4_UNUSED>,
<J784S4_SERDES1_LANE0_PCIE0_LANE0>, <J784S4_SERDES1_LANE1_QSGMII_LANE4>,
<J784S4_SERDES1_LANE2_PCIE2_LANE0>, <J784S4_SERDES1_LANE3_IP4_UNUSED>,
<J784S4_SERDES2_LANE0_QSGMII_LANE5>, <J784S4_SERDES2_LANE1_QSGMII_LANE6>,
<J784S4_SERDES2_LANE2_QSGMII_LANE1>, <J784S4_SERDES2_LANE3_QSGMII_LANE2>,
<J784S4_SERDES4_LANE0_IP3_UNUSED>, <J784S4_SERDES4_LANE1_IP3_UNUSED>,
<J784S4_SERDES4_LANE2_QSGMII_LANE7>, <J784S4_SERDES4_LANE3_QSGMII_LANE8>;
};SGMII 可与以下器件树正常工作。
&main_cpsw0 {
status = "okay";
pinctrl-names = "default";
};
&main_cpsw0_port5 {
status = "okay";// "disabled";//
phy-mode = "sgmii";
mac-address = [00 00 00 00 00 00];
phys = <&cpsw0_phy_gmii_sel 5>, <&serdes2_sgmii56_link>;
phy-names = "mac", "serdes";
fixed-link {
speed = <1000>;
full-duplex;
};
};
&main_cpsw0_port6 {
status = "okay";
phy-mode = "sgmii";
mac-address = [00 00 00 00 00 00];
phys = <&cpsw0_phy_gmii_sel 6>, <&serdes2_sgmii56_link>;
phy-names = "mac", "serdes";
fixed-link {
speed = <1000>;
full-duplex;
};
};
&serdes_wiz2 {
status = "okay";
assigned-clock-parents = <&k3_clks 406 10>;
};
&serdes2 {
status = "okay";
#address-cells = <1>;
#size-cells = <0>;
serdes2_sgmii56_link: phy@1 {
reg = <1>;
cdns,num-lanes = <2>;
#phy-cells = <0>;
cdns,phy-type = <PHY_TYPE_SGMII>;
resets = <&serdes_wiz2 1>, <&serdes_wiz2 2>;
};
};
&serdes_ln_ctrl {
idle-states =
<J784S4_SERDES0_LANE0_PCIE1_LANE0>, <J784S4_SERDES0_LANE1_IP1_UNUSED>,
<J784S4_SERDES0_LANE2_PCIE3_LANE0>, <J784S4_SERDES0_LANE3_IP4_UNUSED>,
<J784S4_SERDES1_LANE0_PCIE0_LANE0>, <J784S4_SERDES1_LANE1_QSGMII_LANE4>,
<J784S4_SERDES1_LANE2_PCIE2_LANE0>, <J784S4_SERDES1_LANE3_IP4_UNUSED>,
<J784S4_SERDES2_LANE0_QSGMII_LANE5>, <J784S4_SERDES2_LANE1_QSGMII_LANE6>,
<J784S4_SERDES2_LANE2_QSGMII_LANE1>, <J784S4_SERDES2_LANE3_QSGMII_LANE2>,
<J784S4_SERDES4_LANE0_IP3_UNUSED>, <J784S4_SERDES4_LANE1_IP3_UNUSED>,
<J784S4_SERDES4_LANE2_QSGMII_LANE7>, <J784S4_SERDES4_LANE3_QSGMII_LANE8>;
};此致、
James
