[参考译文] J721EXSOMXEVM：使用三级引导加载程序(BootApp)引导 U-Boot

请注意、TI 负责人员在本周余下时间内不在办公、否则可能会延迟回复。

此致、

kb

您好、Louie：

但是、不记录在 BootApp (三级引导加载程序)中使用 U-Boot。

您不清楚为什么要使用 BootApp 加载 U-Boot。 BootApp 旨在将所有内核与相应的映像加载。  我们希望客户使用 SPL+uBoot 或 SBL+BootApp 组合。

谢谢。

我们需要 LPM 演示特性(例如仅 MCU 模式和切换到活动模式)以及 U-Boot、因为我们需要一些 BootApp 中不存在的 U-Boot 特性。 由于 LPM 演示使用 SBL+BootApp、我们想知道是否可以 通过执行 SBL+BootApp+uBoot 或 SBL+BootApp+SPL+uBoot 来添加 U-Boot。 是否有方法可以实现引导流程的此配置？

尊敬的 Louie：

感谢您的参与。 我和冈特核对了一下,他分享了确切的细节。

您请求的引导流程不是我们在 TI SDK 中提供或测试的标准支持、 这看起来特定于您的项目、因为我们没有从任何其他客户那里听到此消息。 理想情况下、我们不希望客户混合 SPL+uBoot 和 SBL+BootApp 流程。 此外、TI 尚未测试所请求的 SBL+BootApp+uBoot 或 SBL+BootApp+SPL+uBoot 流程。  

虽然这个流程在理论上是可行的、但我们需要时间来规划和测试它。 我们建议您自己来做、并尝试从 Gunter 那里获得帮助、因为我们正在等待我们在印度的团队度假回来、以支持您的疑虑/问题。

谢谢。

您好！

Gunter 和我试图自己获得一个工作设置,但我们失败了。 现在印度的团队已经休假回来、我们能否收到他们的最新消息？ 谢谢。

大家好！

在通过成功引导 Linux 内核验证 LPM 引导应用程序流程(更具体地说、我们先尝试以下方法)后：

大家好！

由于我们不确定是否可以原样使用"u-boot"ELF 二进制文件、因此我们尝试了使用 u-boot.bin 来创建 appimage。

通过修改 ti-processor-sdk-rtos-j721e-evm-10_00_00_05/mcusw/mcuss_demos/boot_app_mcu_rtos/main_domain_apps/scripts/HLOS/constructappimagehlos.sh 中的脚本完成了此操作  

~/ti-processor-sdk-rtos-j721e-evm-10_00_00_05/mcusw/mcuss_demos/boot_app_mcu_rtos/main_domain_apps/scripts/hlos$ diff -Nurp constructappimageshlos.sh.orig constructappimageshlos.sh
--- constructappimageshlos.sh.orig	2024-10-29 16:55:02.919507804 -0700
+++ constructappimageshlos.sh	2024-10-31 16:29:04.979724428 -0700
@@ -7,7 +7,8 @@
 MY_BOARD=$1
 
 # OS options are: linux or qnx
-OS=qnx
+OS=linux
+TOOLCHAIN_PATH_GCC_ARCH64=/home/gunter/ti/arm-gnu-toolchain-13.2.Rel1-x86_64-aarch64-none-linux-gnu/bin
 
 # Linux-specific paths
 # --------------------
@@ -17,7 +18,7 @@ OS=qnx
 # base-board.dtb (k3-j72*-common-proc-board.dtb), and Image files
 
 # Linux build directory containing all the locally-built Linux-related binaries
-LINUX_BUILD_DIR_PATH=USER_DEFINED_PATH
+LINUX_BUILD_DIR_PATH=/home/gunter/ti-processor-sdk-rtos-j721e-evm-10_00_00_05/pdk_jacinto_10_00_00_27/packages/ti/boot/sbl/tools/combined_appimage/bin/${MY_BOARD}
 
 # QNX-specific paths
 # ------------------
@@ -40,7 +41,8 @@ PDK_INSTALL_PATH="${SDK_INSTALL_PATH}/pd
 SBL_REPO_PATH="${PDK_INSTALL_PATH}/ti/boot/sbl"
 MULTICORE_APPIMAGE_GEN_TOOL_PATH="${SBL_REPO_PATH}/tools/multicoreImageGen/bin"
 SBL_OUT2RPRC_GEN_TOOL_PATH="${SBL_REPO_PATH}/tools/out2rprc/bin"
-MULTICOREAPP_BIN_PATH=${PWD}/../../binary/bin/${MY_BOARD}
+#MULTICOREAPP_BIN_PATH=${PWD}/../../binary/bin/${MY_BOARD}
+MULTICOREAPP_BIN_PATH=${PDK_INSTALL_PATH}/ti/boot/sbl/tools/combined_appimage/bin/${MY_BOARD}
 
 LDS_PATH=${PWD}/${OS}
 
@@ -48,7 +50,9 @@ LDS_PATH=${PWD}/${OS}
 if [ $OS == "linux" ]; then
     GenFiles=("atf_optee" \
               "tidtb_linux" \
-              "tikernelimage_linux"
+              "tikernelimage_linux" \
+              "tiubootimage_linux" \
+              "tiubootsplimage_linux"
              );
 fi
 if [ $OS == "qnx" ]; then
@@ -73,7 +77,7 @@ for i in "${GenFiles[@]}"
 do
     echo "Generating $i image"
     if [ $OS == "linux" ]; then
-        aarch64-none-linux-gnu-ld -T $LDS_PATH/$i.lds -o $MULTICOREAPP_BIN_PATH/$i.elf
+        ${TOOLCHAIN_PATH_GCC_ARCH64}/aarch64-none-linux-gnu-ld -T $LDS_PATH/$i.lds -o $MULTICOREAPP_BIN_PATH/$i.elf
     fi
     if [ $OS == "qnx" ]; then
         ${TOOLCHAIN_PATH_GCC_ARCH64}/aarch64-unknown-nto-qnx7.0.0-ld -T $LDS_PATH/$i.lds -o $MULTICOREAPP_BIN_PATH/$i.elf

这会生成 appimage

正在生成 tiubootimage_linux 映像
警告：此应用程序支持的运行时版本不可用。
使用默认运行时：v4.0.30319
解析输入目标文件/home/gunter/ti-processor-sdk-rtos-j721e-evm-10_00_00_05/mcusw/mcuss_demos/boot_app_mcu_rtos/main_domain_apps/scripts/hlos/../../../../../../pdk_jacinto_10_00_00_27/packages/ti/boot/sbl/tools/combined_appimage/bin/j721e_evm_lastmile/tiubootimage_linux.elf.
文件转换完成！
输入文件的数量1.

-rw-rw-r-- 1 Gunter Gunter 1395240 Oct 31 16:29 tiubootimage_linux.appimage
-rwxrwxr-x 1 Gunter Gunter 1461296 OCT 31 16:29 tiubootimage_linux.elf*
-rw-rw-r-- 1 Gunter Gunter 1395208 Oct 31 16:29 tiubootimage_linux.rprc.

将此 appimage 写入位于0x7C0000的 OSPI 中、在打印 ATF/OPTEE 后、它也不会打印出任何 u-boot 横幅。

如何创建正确的 u-boot 应用程序映像？

谢谢！

——Gunter

Keerthy、您好！

是的、我们可以尝试这样做、直接从 u-boot.img 生成 appimage 并将其刷写。 我们很快回来。

此致、

——Gunter

Keerthy、您好！

我已经使用 u-boot.img 和 lds 文件设置为入口点0x80080000进行测试、这是内核 lds 文件中使用的值。 但很遗憾、在 ATF/OPTEE 之后没有打印输出。

当 ATF/OPTEE 输出完成时、使用 CCS 拦截 A72内核以检查其位置、结果为 PC = 0x200、其中没有代码。

另外,我已经使用 u-boot.bin 来生成 appimage 从,再次为0x80080000 ,但症状是相同的,没有打印输出.

在这里、拦截时、PC 位于大约0x8011xxxx 的 DDR 范围内、且带有代码。

最后、在该状态下、我加载了 u-boot (无扩展名的 u-boot)的真正 ELF 二进制文件。 然后、这会将 PC 置于真正的入口点、IS 位于0x800800000处的符号_START。

不知何故,我觉得我们不是在正确的地方启动 u-boot。 ATF/OPTEE 可能不会分支到 u-boot 实际启动的位置。

此致、

——Gunter

Keerthy、您好！

我改为使用 u-boot-spl 运行了测试、因为 u-boot-spl 具有与内核相同的入口点、即0x80080000。

这是 lds 文件

/*
 * tiubootspl_linux.lds - simple linker file for stand-alone Linux kernel booting
 *
 * Copyright (C) 2024 Texas Instruments Incorporated - http://www.ti.com/
 *
 * Use of this source code is governed by a BSD-style license that can be
 * found in the LICENSE.txt file.
 */
OUTPUT_FORMAT("elf64-littleaarch64")
OUTPUT_ARCH(aarch64)
TARGET(binary)
INPUT(u-boot-spl.bin)
SECTIONS
{
 . = 0x0000000080080000;
 ubootimage = .;
 .ubootimage : { u-boot-spl.bin }
}

然后、我将 tiubootspl_linux 添加到了结构脚本中

# Defines which appimages this script will create
if [ $OS == "linux" ]; then
    GenFiles=("atf_optee" \
              "tidtb_linux" \
              "tiubootspl_linux" \
              "tiuboot_linux" \
              "tikernelimage_linux"
             );

因此、u-boot-spl 实际上会在 ATF/OPTEE 完成后输出。

NOTICE:  BL31: v2.10.0(release):v2.10.0-367-g00f1ec6b87-dirty
NOTICE:  BL31: Built : 16:09:05, Feb  9 2024
I/TC: 
I/TC: OP-TEE version: 4.2.0-dev (gcc version 13.3.0 (GCC)) #1 Fri Apr 12 09:51:21 UTC 2024 aarch64
I/TC: WARNING: This OP-TEE configuration might be insecure!
I/TC: WARNING: Please check optee.readthedocs.io/.../porting_guidelines.html
I/TC: Primary CPU initializing
I/TC: GIC redistributor base address not provided
I/TC: Assuming default GIC group status and modifier
I/TC: SYSFW ABI: 4.0 (firmware rev 0x000a '10.0.8--v10.00.08 (Fiery Fox)')
I/TC: HUK Initialized
I/TC: Activated SA2UL device
I/TC: Fixing SA2UL firewall owner for GP device
I/TC: Enabled firewalls for SA2UL TRNG device
I/TC: SA2UL TRNG initialized
I/TC: SA2UL Drivers initialized
I/TC: Primary CPU switching to normal world boot

U-Boot SPL 2024.04-dirty (Oct 25 2024 - 11:55:47 -0700)
SYSFW ABI: 4.0 (firmware rev 0x000a '10.0.8--v10.00.08 (Fiery Fox)')
ti_i2c_eeprom_am6_parse_record: Ignoring record id 17
Detected: J7X-BASE-CPB rev E3
Detected: J7X-VSC8514-ETH rev E2
error getting GPIO lookup name: -22
Trying to boot from SPI
k3-navss-ringacc ringacc@2b800000: Ring Accelerator probed rings:286, gp-rings[96,20] sci-dev-id:235
k3-navss-ringacc ringacc@2b800000: dma-ring-reset-quirk: disabled

因此、这证明 ATF/OPTEE 实际上分支到0x80080000、而 u-boot-spl 将该寄存器作为默认入口点。

现在的问题是、如何使用 u-boot-spl 及其 DTB 文件创建组合 appimage、以便它可以正常运行、然后从 SDCard 中提取 u-boot、例如

此致、

——Gunter

Gunter,

然后、可以将 U-Boot 加载到 A72 SPL 在 OSPI 中查找它的位置？

fatload MMC 1  $｛loadaddr｝u-boot.img

SF 更新$loadaddr 0x280000 $filesize

此致、
基尔西

Keerthy、您好！

我们确认 u-boot 出现、即使未更改旁路选项也是如此。 我们将 ATF/optee 二进制文件保留为原样、只需替换 tiuboot_linux.appimage

但我们遇到了一个问题、即以太网未启动、正如您在上面的 u-boot 日志中所看到的。

CDNs, Sierra SerDes@5000000: Sierra probed.
Sierra _phy_link 链接：等待 PHY 状态就绪超时
Sierra _phy_link 链接：PHY：无法为链路通电：-110。
PHY_POWER_ON 失败！：-110
net：am65_cpsw_nuss_port ethernet@46000000port@1：未设置 GMII_SEL PHY 模式！：请求的：00000002、gmii_sel：00000001

U-Boot 2024.04-00001-g0e054b7c-dirty (Nov 05 2024 - 14:22:20 -0800)

SoC:   J721E SR1.1 GP
Model: Texas Instruments J721E SK
ti_i2c_eeprom_am6_parse_record: Ignoring record id 17
Board: J721EX-PM2-SOM rev E8
DRAM:  2 GiB (effective 4 GiB)
Core:  125 devices, 33 uclasses, devicetree: fit
Flash: 0 Bytes
MMC:   mmc@4fb0000: 1
Loading Environment from nowhere... OK
In:    serial@2800000
Out:   serial@2800000
Err:   serial@2800000
am65_cpsw_nuss ethernet@46000000: K3 CPSW: nuss_ver: 0x6BA00101 cpsw_ver: 0x6BA80100 ale_ver: 0x00293904 Ports:1
Detected: J7X-BASE-CPB rev E3
Detected: J7X-VSC8514-ETH rev E2
cdns,sierra serdes@5000000: sierra probed
sierra_phy_link link: Timeout waiting for PHY status ready
sierra_phy_link link: PHY: Failed to power on link: -110.
phy_power_on failed!!: -110
Net:   am65_cpsw_nuss_port ethernet@46000000port@1: gmii_sel PHY mode NOT SET!: requested: 00000002, gmii_sel: 00000001
eth0: ethernet@46000000port@1
Hit any key to stop autoboot:  0 
=>

看起来 SGMII PHY 未正确初始化。

例如、从 sdcard 的正常 u-boot 显示正确的以太网启动

am65_cpsw_nuss 以太网@46000000：K3 CPSW：nuss_ver：0x6BA00101 cpsw_ver：0x6BA80100 ALE_ver：0x00293904端口：1

U-Boot 2024.04-ti-g818c76aed67f (Aug 01 2024 - 19:19:47 +0000)

SoC:   J721E SR1.1 GP
Model: Texas Instruments J721E SK
Board: J721EX-PM2-SOM rev E8
DRAM:  2 GiB (effective 4 GiB)
Core:  125 devices, 33 uclasses, devicetree: separate
Flash: 0 Bytes
MMC:   mmc@4fb0000: 1
Loading Environment from nowhere... OK
In:    serial@2800000
Out:   serial@2800000
Err:   serial@2800000
am65_cpsw_nuss ethernet@46000000: K3 CPSW: nuss_ver: 0x6BA00101 cpsw_ver: 0x6BA80100 ale_ver: 0x00293904 Ports:1
Detected: J7X-BASE-CPB rev E3
Detected: J7X-VSC8514-ETH rev E2
cdns,sierra serdes@5000000: sierra probed
Net:   eth0: ethernet@46000000port@1
Hit any key to stop autoboot:  0 
=>

此致、

——Gunter

Keerthy、您好！

我不确定此 SerDes PHY 正确切地初始化在何处、例如在正常运行的 SD 卡 u-boot 启动上。 (可能在 SPL 中？)

此外,我被提醒的事实,我们只使用 u-boot.bin 来制作 appimage 从.

您知道、通常有 u-boot.img、它是 u-boot.bin 和 u-boot DTB 的合适映像。 我们可能在 u-boot DTB 中遗漏了什么吗？

谢谢！

——Gunter

在此处发布 Tanmay 的回复：

我们是否已在 SBL 中解锁了 Ctrl MMR 寄存器？ 如果没有、请按照以下常见问题解答来解锁 SBL 中的 Ctrl MMR

https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1278947/faq-tda4vl-how-to-resolve-netdev-watchdog-transmit-queue-timed-out-issue-in-linux-a72-in-case-of-sbl-optimized-boot-flow

 - Tanmay

大家好、Tanmay 和 Keerthy、

我刚刚在 sbl_CUST_img 中解锁 CTRLMMR 寄存器。 u-boot 以太网现已可用！ 我们现在可以执行以下操作：使用 u-boot 命令进行 tftp。

NOTICE:  BL31: v2.10.0(release):v2.10.0-367-g00f1ec6b87-dirty
NOTICE:  BL31: Built : 16:09:05, Feb  9 2024
I/TC: 
I/TC: OP-TEE version: 4.2.0-dev (gcc version 13.3.0 (GCC)) #1 Fri Apr 12 09:51:21 UTC 2024 aarch64
I/TC: WARNING: This OP-TEE configuration might be insecure!
I/TC: WARNING: Please check optee.readthedocs.io/.../porting_guidelines.html
I/TC: Primary CPU initializing
I/TC: GIC redistributor base address not provided
I/TC: Assuming default GIC group status and modifier
I/TC: SYSFW ABI: 4.0 (firmware rev 0x000a '10.0.8--v10.00.08 (Fiery Fox)')
I/TC: HUK Initialized
I/TC: Activated SA2UL device
I/TC: Fixing SA2UL firewall owner for GP device
I/TC: Enabled firewalls for SA2UL TRNG device
I/TC: SA2UL TRNG initialized
I/TC: SA2UL Drivers initialized
I/TC: Primary CPU switching to normal world boot

U-Boot SPL 2024.04-ti-g818c76aed67f (Aug 01 2024 - 19:19:47 +0000)
SYSFW ABI: 4.0 (firmware rev 0x000a '10.0.8--v10.00.08 (Fiery Fox)')
Detected: J7X-BASE-CPB rev E3
Detected: J7X-VSC8514-ETH rev E2
error getting GPIO lookup name: -22
Trying to boot from MMC2
Warning: Detected image signing certificate on GP device. Skipping certificate to prevent boot failure. This will fail if the ima
ge was also encrypted
Warning: Detected image signing certificate on GP device. Skipping certificate to prevent boot failure. This will fail if the ima
ge was also encrypted


U-Boot 2024.04-ti-g818c76aed67f (Aug 01 2024 - 19:19:47 +0000)

SoC:   J721E SR1.1 GP
Model: Texas Instruments J721E SK
NOTICE:  BL31: v2.10.0(release):v2.10.0-367-g00f1ec6b87-dirty
NOTICE:  BL31: Built : 16:09:05, Feb  9 2024
I/TC: 
I/TC: OP-TEE version: 4.2.0-dev (gcc version 13.3.0 (GCC)) #1 Fri Apr 12 09:51:21 UTC 2024 aarch64
I/TC: WARNING: This OP-TEE configuration might be insecure!
I/TC: WARNING: Please check optee.readthedocs.io/.../porting_guidelines.html
I/TC: Primary CPU initializing
I/TC: GIC redistributor base address not provided
I/TC: Assuming default GIC group status and modifier
I/TC: SYSFW ABI: 4.0 (firmware rev 0x000a '10.0.8--v10.00.08 (Fiery Fox)')
I/TC: HUK Initialized
I/TC: Activated SA2UL device
I/TC: Fixing SA2UL firewall owner for GP device
I/TC: Enabled firewalls for SA2UL TRNG device
I/TC: SA2UL TRNG initialized
I/TC: SA2UL Drivers initialized
I/TC: Primary CPU switching to normal world boot


U-Boot 2024.04-00001-g0e054b7c-dirty (Nov 05 2024 - 14:22:20 -0800)

SoC:   J721E SR1.1 GP
Model: Texas Instruments J721E SK
ti_i2c_eeprom_am6_parse_record: Ignoring record id 17
Board: J721EX-PM2-SOM rev E8
DRAM:  2 GiB (effective 4 GiB)
Core:  125 devices, 33 uclasses, devicetree: fit
Flash: 0 Bytes
MMC:   mmc@4fb0000: 1
Loading Environment from nowhere... OK
In:    serial@2800000
Out:   serial@2800000
Err:   serial@2800000
am65_cpsw_nuss ethernet@46000000: K3 CPSW: nuss_ver: 0x6BA00101 cpsw_ver: 0x6BA80100 ale_ver: 0x00293904 Ports:1
Detected: J7X-BASE-CPB rev E3
Detected: J7X-VSC8514-ETH rev E2
cdns,sierra serdes@5000000: sierra probed
Net:   eth0: ethernet@46000000port@1
Hit any key to stop autoboot:  0 
=> setenv serverip 192.168.1.32
=> setenv ipaddr 192.168.1.34
=> tftp $loadaddr sbl_cust_img_mcu1_0_release.tiimage
k3-navss-ringacc ringacc@2b800000: Ring Accelerator probed rings:286, gp-rings[96,20] sci-dev-id:235
k3-navss-ringacc ringacc@2b800000: dma-ring-reset-quirk: disabled
am65_cpsw_nuss_port ethernet@46000000port@1: K3 CPSW: rflow_id_base: 2
link up on port 1, speed 1000, full duplex
Using ethernet@46000000port@1 device
TFTP from server 192.168.1.32; our IP address is 192.168.1.34
Filename 'sbl_cust_img_mcu1_0_release.tiimage'.
Load address: 0x82000000
Loading: #################################################################
         ##  0 Bytes
         242.2 KiB/s
done
Bytes transferred = 340078 (5306e hex)
=>

应用于 SBL_MAIN 的补丁

gunter@Linux-005:~/ti-processor-sdk-rtos-j721e-evm-10_00_00_05/pdk_jacinto_10_00_00_27/packages/ti/boot/sbl/board/k3$ diff -Nurp sbl_main.c.orig sbl_main.c
--- sbl_main.c.orig	2024-11-06 15:03:28.827359640 -0800
+++ sbl_main.c	2024-11-06 15:16:30.000139733 -0800
@@ -245,6 +245,70 @@ const CSL_ArmR5MpuRegionCfg gCslR5MpuCfg
 
 };
 
+//GHS--- added to unlock CTRLMMR registers
+#define WKUP_CTRL_MMR0_BASE             0x43000000
+#define MCU_CTRL_MMR0_BASE              0x40f00000
+#define CTRL_MMR0_BASE                  0x00100000
+
+/*
+ * The CTRL_MMR0 memory space is divided into several equally-spaced
+ * partitions, so defining the partition size allows us to determine
+ * register addresses common to those partitions.
+*/
+#define CTRL_MMR0_PARTITION_SIZE       0x4000
+
+/*
+ * CTRL_MMR0, WKUP_CTRL_MMR0, and MCU_CTRL_MMR0 lock/kick-mechanism
+ * shared register definitions. The same registers are also used for
+ * PADCFG_MMR lock/kick-mechanism.
+*/
+#define CTRLMMR_LOCK_KICK0         0x1008
+#define CTRLMMR_LOCK_KICK0_UNLOCK_VAL      0x68ef3490
+#define CTRLMMR_LOCK_KICK1         0x100c
+#define CTRLMMR_LOCK_KICK1_UNLOCK_VAL      0xd172bc5a
+
+
+void CTRL_MMR_unlock(volatile uint32_t baseAddr, uint32_t partition)
+{
+   /* Get the part base address */
+   uint32_t partBaseAddr = baseAddr + (partition * CTRL_MMR0_PARTITION_SIZE);
+
+   /* Unlock the requested partition if locked using two-step sequence */
+   *(volatile uint32_t *)(partBaseAddr + CTRLMMR_LOCK_KICK0) = CTRLMMR_LOCK_KICK0_UNLOCK_VAL;
+   *(volatile uint32_t *)(partBaseAddr + CTRLMMR_LOCK_KICK1) = CTRLMMR_LOCK_KICK1_UNLOCK_VAL;
+}
+
+static void SBL_CTRL_MMR_unlock_all(void)
+{
+   /* Unlock all WKUP_CTRL_MMR0 module registers */
+   CTRL_MMR_unlock(WKUP_CTRL_MMR0_BASE, 0);
+   CTRL_MMR_unlock(WKUP_CTRL_MMR0_BASE, 1);
+   CTRL_MMR_unlock(WKUP_CTRL_MMR0_BASE, 2);
+   CTRL_MMR_unlock(WKUP_CTRL_MMR0_BASE, 3);
+   CTRL_MMR_unlock(WKUP_CTRL_MMR0_BASE, 4);
+   CTRL_MMR_unlock(WKUP_CTRL_MMR0_BASE, 6);
+   CTRL_MMR_unlock(WKUP_CTRL_MMR0_BASE, 7);
+
+   /* Unlock all MCU_CTRL_MMR0 module registers */
+   CTRL_MMR_unlock(MCU_CTRL_MMR0_BASE, 0);
+   CTRL_MMR_unlock(MCU_CTRL_MMR0_BASE, 1);
+   CTRL_MMR_unlock(MCU_CTRL_MMR0_BASE, 2);
+   CTRL_MMR_unlock(MCU_CTRL_MMR0_BASE, 3);
+   CTRL_MMR_unlock(MCU_CTRL_MMR0_BASE, 4);
+
+   /* Unlock all CTRL_MMR0 module registers */
+   CTRL_MMR_unlock(CTRL_MMR0_BASE, 0);
+   CTRL_MMR_unlock(CTRL_MMR0_BASE, 1);
+   CTRL_MMR_unlock(CTRL_MMR0_BASE, 2);
+   CTRL_MMR_unlock(CTRL_MMR0_BASE, 3);
+   CTRL_MMR_unlock(CTRL_MMR0_BASE, 5);
+    #if defined(SOC_J721E)
+       CTRL_MMR_unlock(CTRL_MMR0_BASE, 6);
+   #endif
+   CTRL_MMR_unlock(CTRL_MMR0_BASE, 7);
+}
+//GHS--- 
+
 int main()
 {
     int32_t retVal = CSL_PASS;
@@ -275,6 +339,10 @@ int main()
     /* Any SoC specific Init. */
     SBL_SocEarlyInit();
 
+    //GHS--- Added to unlock CTRLMMR registers
+    /* Unlock control MMR registers */
+    SBL_CTRL_MMR_unlock_all();
+
     if (SBL_LOG_LEVEL > SBL_LOG_ERR)
     {
         /* Configure UART Tx pinmux. */
         

生成 sbl_cust_img

gunter@Linux-005:~/ti-processor-sdk-rtos-j721e-evm-10_00_00_05/pdk_jacinto_10_00_00_27/packages/ti/build$ make -s sbl_cust_img BOARD=j721e_evm
# Compiling j721e_evm:j721e:mcu1_0:release:sbl_cust_img:sbl_main.c
# Linking into /home/gunter/ti-processor-sdk-rtos-j721e-evm-10_00_00_05/pdk_jacinto_10_00_00_27/packages/ti/boot/sbl/binary/j721e_evm/cust/bin/sbl_cust_img_mcu1_0_release.xer5f...
#
#
# /home/gunter/ti-processor-sdk-rtos-j721e-evm-10_00_00_05/pdk_jacinto_10_00_00_27/packages/ti/boot/sbl/binary/j721e_evm/cust/bin/sbl_cust_img_mcu1_0_release.xer5f created.
#
# Generating stripped image into /home/gunter/ti-processor-sdk-rtos-j721e-evm-10_00_00_05/pdk_jacinto_10_00_00_27/packages/ti/boot/sbl/binary/j721e_evm/cust/bin/sbl_cust_img_mcu1_0_release_strip.xer5f...
#
~/ti-processor-sdk-rtos-j721e-evm-10_00_00_05/pdk_jacinto_10_00_00_27/packages/ti/boot/sbl/board/k3 ~/ti-processor-sdk-rtos-j721e-evm-10_00_00_05/pdk_jacinto_10_00_00_27/packages/ti/boot/sbl/board/k3

Debug Extension is Enabled :
SoC UID not specified for Debug Extension. Using UID 0
	UID = 0000000000000000000000000000000000000000000000000000000000000000
	DBG_TYPE = 4
R5 Certificate being generated :
	X509_CFG = ./x509-temp.cfg
	KEY = /home/gunter/ti-processor-sdk-rtos-j721e-evm-10_00_00_05/pdk_jacinto_10_00_00_27/packages/ti/build/makerules/rom_degenerateKey.pem
	BIN = /home/gunter/ti-processor-sdk-rtos-j721e-evm-10_00_00_05/pdk_jacinto_10_00_00_27/packages/ti/boot/sbl/binary/j721e_evm/cust/bin/sbl_cust_img_mcu1_0_release.bin
	CERT TYPE = R5, 1
	CORE ID = 16
	LOADADDR = 0x41c00100
	IMAGE_SIZE = 339016
	BOOT_OPTIONS = 2
Certificate being generated :
SUCCESS: Image /home/gunter/ti-processor-sdk-rtos-j721e-evm-10_00_00_05/pdk_jacinto_10_00_00_27/packages/ti/boot/sbl/binary/j721e_evm/cust/bin/sbl_cust_img_mcu1_0_release.tiimage generated. Good to boot
# SBL image /home/gunter/ti-processor-sdk-rtos-j721e-evm-10_00_00_05/pdk_jacinto_10_00_00_27/packages/ti/boot/sbl/binary/j721e_evm/cust/bin/sbl_cust_img_mcu1_0_release.bin created.
#

然后 将 sbl_cust_img_mcu1_0_release.tiimage 刷写到 OSPI 中。

此致、

——Gunter